Merge changes I26cefbb5,I6a8b3528,I323fb741 into integration
* changes:
fix(stm32mp2): set PLAT_MAX_PWR_LVL to one
feat(stm32mp2): boot BL33 at EL1 or EL2
feat(stm32mp2): disable unsupported features
diff --git a/plat/st/stm32mp2/include/platform_def.h b/plat/st/stm32mp2/include/platform_def.h
index b98b56d..e720c02 100644
--- a/plat/st/stm32mp2/include/platform_def.h
+++ b/plat/st/stm32mp2/include/platform_def.h
@@ -33,7 +33,7 @@
#define PLATFORM_CORE_COUNT U(2)
#define PLATFORM_MAX_CPUS_PER_CLUSTER U(2)
-#define PLAT_MAX_PWR_LVL U(3)
+#define PLAT_MAX_PWR_LVL U(1)
#define PLAT_MIN_SUSPEND_PWR_LVL U(2)
#define PLAT_NUM_PWR_DOMAINS U(6)
diff --git a/plat/st/stm32mp2/plat_bl2_mem_params_desc.c b/plat/st/stm32mp2/plat_bl2_mem_params_desc.c
index 2513180..8ca582e 100644
--- a/plat/st/stm32mp2/plat_bl2_mem_params_desc.c
+++ b/plat/st/stm32mp2/plat_bl2_mem_params_desc.c
@@ -10,6 +10,12 @@
#include <platform_def.h>
+#if STM32MP_BL33_EL1
+#define BL33_MODE MODE_EL1
+#else
+#define BL33_MODE MODE_EL2
+#endif
+
/*******************************************************************************
* Following descriptor provides BL image/ep information that gets used
* by BL2 to load the images and also subset of this information is
@@ -138,7 +144,7 @@
VERSION_2, entry_point_info_t,
NON_SECURE | EXECUTABLE),
- .ep_info.spsr = SPSR_64(MODE_EL1, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS),
+ .ep_info.spsr = SPSR_64(BL33_MODE, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS),
SET_STATIC_PARAM_HEAD(image_info, PARAM_EP,
VERSION_2, image_info_t,
diff --git a/plat/st/stm32mp2/platform.mk b/plat/st/stm32mp2/platform.mk
index df1cacd..2a9b6fd 100644
--- a/plat/st/stm32mp2/platform.mk
+++ b/plat/st/stm32mp2/platform.mk
@@ -15,6 +15,15 @@
PROGRAMMABLE_RESET_ADDRESS := 1
BL2_IN_XIP_MEM := 1
+STM32MP_BL33_EL1 ?= 1
+ifeq ($(STM32MP_BL33_EL1),1)
+INIT_UNUSED_NS_EL2 := 1
+endif
+
+# Disable features unsupported in ARMv8.0
+ENABLE_SPE_FOR_NS := 0
+ENABLE_SVE_FOR_NS := 0
+
# Default Device tree
DTB_FILE_NAME ?= stm32mp257f-ev1.dtb
@@ -83,6 +92,7 @@
STM32MP_DDR4_TYPE \
STM32MP_LPDDR4_TYPE \
STM32MP25 \
+ STM32MP_BL33_EL1 \
)))
$(eval $(call assert_numerics,\
@@ -105,6 +115,7 @@
STM32MP_DDR4_TYPE \
STM32MP_LPDDR4_TYPE \
STM32MP25 \
+ STM32MP_BL33_EL1 \
)))
# STM32MP2x is based on Cortex-A35, which is Armv8.0, and does not support BTI