| commit | 9afae786a6cab173bf98f0f4770eb61be15f29c3 | [log] [tgz] |
|---|---|---|
| author | Icenowy Zheng <icenowy@aosc.io> | Sun Jul 22 21:27:30 2018 +0800 |
| committer | Icenowy Zheng <icenowy@aosc.io> | Fri Sep 07 22:09:45 2018 +0800 |
| tree | 08f8a7b638b22b0e2c538aa90f3ee28a70e191ee | |
| parent | 7508befeac046877614fc1f14802da2cdafdf29d [diff] |
drivers: mentor: mi2cv: add inverted interrupt clear flag quirk The I2C controller on Allwinner SoCs after A31 has a inverted interrupt clear flag, which needs to be written 1 (rather than 0 on Marvell SoCs and old Allwinner SoCs) to clear. Add such a quirk to mi2cv driver common code. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>