rpi: move plat_helpers.S to common
The plat_helpers.S file was almost identical between its RPi3 and RPi4
versions. Unify the two files, moving it into the common/ directory.
This adds a plat_rpi_get_model() function, which can be used to trigger
RPi4 specific action, detected at runtime. We use that to do the RPi4
specific L2 cache initialisation.
Change-Id: I2295704fd6dde7c76fe83b6d98c7bf998d4bf074
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
diff --git a/plat/rpi/rpi4/aarch64/plat_helpers.S b/plat/rpi/common/aarch64/plat_helpers.S
similarity index 85%
rename from plat/rpi/rpi4/aarch64/plat_helpers.S
rename to plat/rpi/common/aarch64/plat_helpers.S
index fac1b20..93c8f7f 100644
--- a/plat/rpi/rpi4/aarch64/plat_helpers.S
+++ b/plat/rpi/common/aarch64/plat_helpers.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -20,6 +20,7 @@
.globl plat_reset_handler
.globl plat_rpi3_calc_core_pos
.globl plat_secondary_cold_boot_setup
+ .globl plat_rpi_get_model
/* -----------------------------------------------------
* unsigned int plat_my_core_pos(void)
@@ -56,7 +57,7 @@
func plat_is_my_cpu_primary
mrs x0, mpidr_el1
and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
- cmp x0, #RPI4_PRIMARY_CPU
+ cmp x0, #RPI_PRIMARY_CPU
cset w0, eq
ret
endfunc plat_is_my_cpu_primary
@@ -165,10 +166,37 @@
endfunc plat_crash_console_flush
/* ---------------------------------------------
+ * int plat_rpi_get_model()
+ * Macro to determine whether we are running on
+ * a Raspberry Pi 3 or 4. Just checks the MIDR for
+ * being either a Cortex-A72 or a Cortex-A53.
+ * Out : return 4 if RPi4, 3 otherwise.
+ * Clobber list : x0
+ * ---------------------------------------------
+ */
+ .macro _plat_rpi_get_model
+ mrs x0, midr_el1
+ and x0, x0, #0xf0 /* Isolate low byte of part number */
+ cmp w0, #0x80 /* Cortex-A72 (RPi4) is 0xd08, A53 is 0xd03 */
+ mov w0, #3
+ csinc w0, w0, w0, ne
+ .endm
+
+ func plat_rpi_get_model
+ _plat_rpi_get_model
+ ret
+ endfunc plat_rpi_get_model
+
+ /* ---------------------------------------------
* void plat_reset_handler(void);
* ---------------------------------------------
*/
func plat_reset_handler
+ /* L2 cache setup only needed on RPi4 */
+ _plat_rpi_get_model
+ cmp w0, #4
+ b.ne 1f
+
/* ------------------------------------------------
* Set L2 read/write cache latency:
* - L2 Data RAM latency: 3 cycles (0b010)
@@ -181,5 +209,6 @@
msr CORTEX_A72_L2CTLR_EL1, x0
isb
+1:
ret
endfunc plat_reset_handler
diff --git a/plat/rpi/common/include/rpi_shared.h b/plat/rpi/common/include/rpi_shared.h
index 6863438..ddf239e 100644
--- a/plat/rpi/common/include/rpi_shared.h
+++ b/plat/rpi/common/include/rpi_shared.h
@@ -36,4 +36,6 @@
/* VideoCore firmware commands */
int rpi3_vc_hardware_get_board_revision(uint32_t *revision);
+int plat_rpi_get_model(void);
+
#endif /* RPI3_PRIVATE_H */
diff --git a/plat/rpi/rpi3/aarch64/plat_helpers.S b/plat/rpi/rpi3/aarch64/plat_helpers.S
deleted file mode 100644
index ab925b6..0000000
--- a/plat/rpi/rpi3/aarch64/plat_helpers.S
+++ /dev/null
@@ -1,163 +0,0 @@
-/*
- * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include <arch.h>
-#include <asm_macros.S>
-#include <assert_macros.S>
-#include <platform_def.h>
-
- .globl plat_crash_console_flush
- .globl plat_crash_console_init
- .globl plat_crash_console_putc
- .globl platform_mem_init
- .globl plat_get_my_entrypoint
- .globl plat_is_my_cpu_primary
- .globl plat_my_core_pos
- .globl plat_rpi3_calc_core_pos
- .globl plat_secondary_cold_boot_setup
-
- /* -----------------------------------------------------
- * unsigned int plat_my_core_pos(void)
- *
- * This function uses the plat_rpi3_calc_core_pos()
- * definition to get the index of the calling CPU.
- * -----------------------------------------------------
- */
-func plat_my_core_pos
- mrs x0, mpidr_el1
- b plat_rpi3_calc_core_pos
-endfunc plat_my_core_pos
-
- /* -----------------------------------------------------
- * unsigned int plat_rpi3_calc_core_pos(u_register_t mpidr);
- *
- * CorePos = (ClusterId * 4) + CoreId
- * -----------------------------------------------------
- */
-func plat_rpi3_calc_core_pos
- and x1, x0, #MPIDR_CPU_MASK
- and x0, x0, #MPIDR_CLUSTER_MASK
- add x0, x1, x0, LSR #6
- ret
-endfunc plat_rpi3_calc_core_pos
-
- /* -----------------------------------------------------
- * unsigned int plat_is_my_cpu_primary (void);
- *
- * Find out whether the current cpu is the primary
- * cpu.
- * -----------------------------------------------------
- */
-func plat_is_my_cpu_primary
- mrs x0, mpidr_el1
- and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
- cmp x0, #RPI3_PRIMARY_CPU
- cset w0, eq
- ret
-endfunc plat_is_my_cpu_primary
-
- /* -----------------------------------------------------
- * void plat_secondary_cold_boot_setup (void);
- *
- * This function performs any platform specific actions
- * needed for a secondary cpu after a cold reset e.g
- * mark the cpu's presence, mechanism to place it in a
- * holding pen etc.
- * -----------------------------------------------------
- */
-func plat_secondary_cold_boot_setup
- /* Calculate address of our hold entry */
- bl plat_my_core_pos
- lsl x0, x0, #3
- mov_imm x2, PLAT_RPI3_TM_HOLD_BASE
- add x0, x0, x2
-
- /*
- * This code runs way before requesting the warmboot of this core,
- * so it is possible to clear the mailbox before getting a request
- * to boot.
- */
- mov x1, PLAT_RPI3_TM_HOLD_STATE_WAIT
- str x1,[x0]
-
- /* Wait until we have a go */
-poll_mailbox:
- wfe
- ldr x1, [x0]
- cmp x1, PLAT_RPI3_TM_HOLD_STATE_GO
- bne poll_mailbox
-
- /* Jump to the provided entrypoint */
- mov_imm x0, PLAT_RPI3_TM_ENTRYPOINT
- ldr x1, [x0]
- br x1
-endfunc plat_secondary_cold_boot_setup
-
- /* ---------------------------------------------------------------------
- * uintptr_t plat_get_my_entrypoint (void);
- *
- * Main job of this routine is to distinguish between a cold and a warm
- * boot.
- *
- * This functions returns:
- * - 0 for a cold boot.
- * - Any other value for a warm boot.
- * ---------------------------------------------------------------------
- */
-func plat_get_my_entrypoint
- /* TODO: support warm boot */
- mov x0, #0
- ret
-endfunc plat_get_my_entrypoint
-
- /* ---------------------------------------------
- * void platform_mem_init (void);
- *
- * No need to carry out any memory initialization.
- * ---------------------------------------------
- */
-func platform_mem_init
- ret
-endfunc platform_mem_init
-
- /* ---------------------------------------------
- * int plat_crash_console_init(void)
- * Function to initialize the crash console
- * without a C Runtime to print crash report.
- * Clobber list : x0 - x3
- * ---------------------------------------------
- */
-func plat_crash_console_init
- mov_imm x0, PLAT_RPI_MINI_UART_BASE
- mov x1, xzr
- mov x2, xzr
- b console_16550_core_init
-endfunc plat_crash_console_init
-
- /* ---------------------------------------------
- * int plat_crash_console_putc(int c)
- * Function to print a character on the crash
- * console without a C Runtime.
- * Clobber list : x1, x2
- * ---------------------------------------------
- */
-func plat_crash_console_putc
- mov_imm x1, PLAT_RPI_MINI_UART_BASE
- b console_16550_core_putc
-endfunc plat_crash_console_putc
-
- /* ---------------------------------------------
- * int plat_crash_console_flush()
- * Function to force a write of all buffered
- * data that hasn't been output.
- * Out : return -1 on error else return 0.
- * Clobber list : x0, x1
- * ---------------------------------------------
- */
-func plat_crash_console_flush
- mov_imm x0, PLAT_RPI_MINI_UART_BASE
- b console_16550_core_flush
-endfunc plat_crash_console_flush
diff --git a/plat/rpi/rpi3/include/platform_def.h b/plat/rpi/rpi3/include/platform_def.h
index 9cacd99..2bcf53e 100644
--- a/plat/rpi/rpi3/include/platform_def.h
+++ b/plat/rpi/rpi3/include/platform_def.h
@@ -24,7 +24,7 @@
#define PLATFORM_CLUSTER0_CORE_COUNT PLATFORM_MAX_CPUS_PER_CLUSTER
#define PLATFORM_CORE_COUNT PLATFORM_CLUSTER0_CORE_COUNT
-#define RPI3_PRIMARY_CPU U(0)
+#define RPI_PRIMARY_CPU U(0)
#define PLAT_MAX_PWR_LVL MPIDR_AFFLVL1
#define PLAT_NUM_PWR_DOMAINS (PLATFORM_CLUSTER_COUNT + \
diff --git a/plat/rpi/rpi3/platform.mk b/plat/rpi/rpi3/platform.mk
index a5b8904..bcfc34e 100644
--- a/plat/rpi/rpi3/platform.mk
+++ b/plat/rpi/rpi3/platform.mk
@@ -15,6 +15,7 @@
drivers/gpio/gpio.c \
drivers/delay_timer/delay_timer.c \
drivers/rpi3/gpio/rpi3_gpio.c \
+ plat/rpi/common/aarch64/plat_helpers.S \
plat/rpi/common/rpi3_common.c \
${XLAT_TABLES_LIB_SRCS}
@@ -23,7 +24,6 @@
drivers/io/io_storage.c \
lib/cpus/aarch64/cortex_a53.S \
plat/common/aarch64/platform_mp_stack.S \
- plat/rpi/rpi3/aarch64/plat_helpers.S \
plat/rpi/rpi3/rpi3_bl1_setup.c \
plat/rpi/common/rpi3_io_storage.c \
drivers/rpi3/mailbox/rpi3_mbox.c \
@@ -38,7 +38,6 @@
drivers/mmc/mmc.c \
drivers/rpi3/sdhost/rpi3_sdhost.c \
plat/common/aarch64/platform_mp_stack.S \
- plat/rpi/rpi3/aarch64/plat_helpers.S \
plat/rpi/rpi3/aarch64/rpi3_bl2_mem_params_desc.c \
plat/rpi/rpi3/rpi3_bl2_setup.c \
plat/rpi/common/rpi3_image_load.c \
@@ -46,7 +45,6 @@
BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
plat/common/plat_psci_common.c \
- plat/rpi/rpi3/aarch64/plat_helpers.S \
plat/rpi/rpi3/rpi3_bl31_setup.c \
plat/rpi/common/rpi3_pm.c \
plat/rpi/common/rpi3_topology.c \
diff --git a/plat/rpi/rpi4/include/platform_def.h b/plat/rpi/rpi4/include/platform_def.h
index 6f6bbbe..d03eea6 100644
--- a/plat/rpi/rpi4/include/platform_def.h
+++ b/plat/rpi/rpi4/include/platform_def.h
@@ -24,7 +24,7 @@
#define PLATFORM_CLUSTER0_CORE_COUNT PLATFORM_MAX_CPUS_PER_CLUSTER
#define PLATFORM_CORE_COUNT PLATFORM_CLUSTER0_CORE_COUNT
-#define RPI4_PRIMARY_CPU U(0)
+#define RPI_PRIMARY_CPU U(0)
#define PLAT_MAX_PWR_LVL MPIDR_AFFLVL1
#define PLAT_NUM_PWR_DOMAINS (PLATFORM_CLUSTER_COUNT + \
diff --git a/plat/rpi/rpi4/platform.mk b/plat/rpi/rpi4/platform.mk
index 49e78df..0744bce 100644
--- a/plat/rpi/rpi4/platform.mk
+++ b/plat/rpi/rpi4/platform.mk
@@ -16,7 +16,7 @@
${XLAT_TABLES_LIB_SRCS}
BL31_SOURCES += lib/cpus/aarch64/cortex_a72.S \
- plat/rpi/rpi4/aarch64/plat_helpers.S \
+ plat/rpi/common/aarch64/plat_helpers.S \
plat/rpi/rpi4/aarch64/armstub8_header.S \
drivers/arm/gic/common/gic_common.c \
drivers/arm/gic/v2/gicv2_helpers.c \