refactor(tc): append binding for SMMU-700
The usage for SMMU-700 is not consistent across TC platforms:
SMMU-700 on TC2:
| FVP | FPGA
--------+-------+------
Display | Used | Used
GPU | Used | Used
SMMU-700 on TC3:
| FVP | FPGA
--------+-------+------
Display | No | No
GPU | Used | No
This commit changes to use append mode for SMMU-700 to bind it on TC2
and TC3 separately. As a result, the TC_IOMMU_EN configuration is not
used, remove it.
Change-Id: Ic4152eb4c8ef97bf27b8a97c3c6cb86e32a2e8eb
Signed-off-by: Leo Yan <leo.yan@arm.com>
diff --git a/fdts/tc-base.dtsi b/fdts/tc-base.dtsi
index 494c825..3449792 100644
--- a/fdts/tc-base.dtsi
+++ b/fdts/tc-base.dtsi
@@ -482,9 +482,6 @@
scmi-perf-domain = <3>;
#endif /* TC_SCMI_PD_CTRL_EN */
-#if TC_IOMMU_EN
- iommus = <&smmu_700 0x200>;
-#endif /* TC_IOMMU_EN */
pbha {
int-id-override = <0 0x22>, <2 0x23>, <4 0x23>, <7 0x22>,
<8 0x22>, <9 0x22>, <10 0x22>, <11 0x22>,
@@ -507,7 +504,6 @@
thermal-zone = "";
};
-#if TC_IOMMU_EN
smmu_700: iommu@3f000000 {
#iommu-cells = <1>;
compatible = "arm,smmu-v3";
@@ -517,8 +513,8 @@
<GIC_SPI 230 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "eventq", "cmdq-sync", "gerror";
dma-coherent;
+ status = "disabled";
};
-#endif /* TC_IOMMU_EN */
dp0: display@DPU_ADDR {
#address-cells = <1>;
@@ -528,9 +524,6 @@
interrupts = <GIC_SPI DPU_IRQ IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "DPU";
DPU_CLK_ATTR1;
-#if TC_IOMMU_EN
- iommus = <&smmu_700 0x100>;
-#endif /* TC_IOMMU_EN */
pl0: pipeline@0 {
reg = <0>;
diff --git a/fdts/tc2.dts b/fdts/tc2.dts
index 69c6886..4946aca 100644
--- a/fdts/tc2.dts
+++ b/fdts/tc2.dts
@@ -237,9 +237,18 @@
};
};
+ smmu_700: iommu@3f000000 {
+ status = "okay";
+ };
+
dp0: display@DPU_ADDR {
#if TC_SCMI_PD_CTRL_EN
power-domains = <&scmi_devpd (PLAT_MAX_CPUS_PER_CLUSTER + 2)>;
#endif
+ iommus = <&smmu_700 0x100>;
+ };
+
+ gpu: gpu@2d000000 {
+ iommus = <&smmu_700 0x200>;
};
};
diff --git a/fdts/tc3.dts b/fdts/tc3.dts
index fe6a695..64546b6 100644
--- a/fdts/tc3.dts
+++ b/fdts/tc3.dts
@@ -85,4 +85,16 @@
shmem = <&cpu_scp_scmi_a2p &cpu_scp_scmi_p2a>;
};
};
+
+#if TARGET_FLAVOUR_FVP
+ smmu_700: iommu@3f000000 {
+ status = "okay";
+ };
+#endif
+
+ gpu: gpu@2d000000 {
+#if TARGET_FLAVOUR_FVP
+ iommus = <&smmu_700 0x200>;
+#endif
+ };
};
diff --git a/plat/arm/board/tc/platform.mk b/plat/arm/board/tc/platform.mk
index cd5abd0..28b98c2 100644
--- a/plat/arm/board/tc/platform.mk
+++ b/plat/arm/board/tc/platform.mk
@@ -10,8 +10,6 @@
TC_DPU_USE_SCMI_CLK := 1
# SCMI power domain control enable
TC_SCMI_PD_CTRL_EN := 1
-# IOMMU: Enable the use of system or individual MMUs
-TC_IOMMU_EN := 1
# System setup
CSS_USE_SCMI_SDS_DRIVER := 1
@@ -76,7 +74,6 @@
TC_RESOLUTION_$(call uppercase,${TC_RESOLUTION}) \
TC_DPU_USE_SCMI_CLK \
TC_SCMI_PD_CTRL_EN \
- TC_IOMMU_EN \
))
CSS_LOAD_SCP_IMAGES := 1