tree 544dc831dfebd8035f110491703ecdadd079a8e5
parent df89f9f7b4422713f8723b66a6decec0b19aa550
author Juan Castillo <juan.castillo@arm.com> 1398685720 +0100
committer Juan Castillo <juan.castillo@arm.com> 1399978268 +0100

Fix C accessors to GIC distributor registers with set/clear semantics

This patch fixes C accessors to GIC registers that follow a set/clear
semantic to change the state of an interrupt, instead of read/write/modify.
These registers are:
  Set-Enable
  Clear-Enable
  Set-Pending
  Clear-Pending
  Set-Active
  Clear-Active
For instance, to enable an interrupt we write a one to the corresponding bit
in the Set-Enable register, whereas to disable it we write a one to the
corresponding bit in the Clear-Enable register.

Fixes ARM-software/tf-issues#137

Change-Id: I3b66bad94d0b28e0fe08c9042bac0bf5ffa07944