corstone700: splitting the platform support into FVP and FPGA
This patch performs the following:
- Creating two corstone700 platforms under corstone700 board:
fvp and fpga
- Since the FVP and FPGA have IP differences, this commit provides a specific DTS for each platform
- The platform can be specified using the TARGET_PLATFORM Makefile variable
(possible values are: fvp or fpga)
- Allowing to use u-boot by:
- Enabling NEED_BL33 option
- Fixing non-secure image base: For no preloaded bl33 we want to
have the NS base set on shared ram. Setup a memory map region
for NS in shared map and set the bl33 address in the area.
- Setting the SYS_COUNTER_FREQ_IN_TICKS based on the selected
platform
- Setting ARM_MAP_SHARED_RAM and ARM_MAP_NS_SHARED_RAM to use MT_MEMORY
Change-Id: I4c8ac3387acb1693ab617bcccab00d80e340c163
Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
diff --git a/fdts/corstone700.dts b/fdts/corstone700.dtsi
similarity index 88%
rename from fdts/corstone700.dts
rename to fdts/corstone700.dtsi
index 851f5e6..2372207 100644
--- a/fdts/corstone700.dts
+++ b/fdts/corstone700.dtsi
@@ -1,22 +1,18 @@
/*
- * Copyright (c) 2019-2020, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2020, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
-/dts-v1/;
+#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
- model = "corstone700";
compatible = "arm,Corstone-700";
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
- chosen {
- bootargs = "console=ttyAMA0 \
- loglevel=9";
- };
+ chosen { };
cpus {
#address-cells = <1>;
@@ -28,7 +24,6 @@
reg = <0>;
next-level-cache = <&L2_0>;
};
-
};
memory@80000000 {
@@ -99,7 +94,21 @@
<1 14 0xf08>,
<1 11 0xf08>,
<1 10 0xf08>;
+ };
+
+ refclk: refclk@1a220000 {
+ compatible = "arm,armv7-timer-mem";
+ reg = <0x1a220000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ frame@1a230000 {
+ frame-number = <0>;
+ interrupts = <0 2 0xf04>;
+ reg = <0x1a230000 0x1000>;
};
+ };
mbox_es0mhu0: mhu@1b000000 {
compatible = "arm,mhuv2","arm,primecell";
@@ -149,5 +158,4 @@
<0x1A010314 0x4>;
reg-names = "rstreg", "streg";
};
-
};
diff --git a/fdts/corstone700_fpga.dts b/fdts/corstone700_fpga.dts
new file mode 100644
index 0000000..814d6a8
--- /dev/null
+++ b/fdts/corstone700_fpga.dts
@@ -0,0 +1,27 @@
+/*
+ * Copyright (c) 2020, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/dts-v1/;
+
+#include "corstone700.dtsi"
+
+/ {
+ model = "corstone700-fpga";
+
+ ethernet: eth@40100000 {
+ compatible = "smsc,lan9115";
+ reg = <0x40100000 0x10000>;
+ phy-mode = "mii";
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ reg-io-width = <2>;
+ smsc,irq-push-pull;
+ };
+};
+
+&refclk {
+ clock-frequency = <32000000>;
+};
diff --git a/fdts/corstone700_fvp.dts b/fdts/corstone700_fvp.dts
new file mode 100644
index 0000000..3b1202d
--- /dev/null
+++ b/fdts/corstone700_fvp.dts
@@ -0,0 +1,40 @@
+/*
+ * Copyright (c) 2020, Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/dts-v1/;
+
+#include "corstone700.dtsi"
+
+/ {
+ model = "corstone700-fvp";
+
+ /*
+ * Intel StrataFlash J3 NOR flash: 2 x 16-bit interleaved components
+ * Flash total size: 32 MB
+ * Allocated flash space: 8 MB
+ */
+
+ flash@8500000 {
+ compatible = "cfi-flash";
+ reg = <0x8500000 0x800000>;
+ bank-width = <4>;
+ device-width= <2>;
+ };
+
+ ethernet: eth@4010000 {
+ compatible = "smsc,lan91c111";
+ reg = <0x40100000 0x10000>;
+ phy-mode = "mii";
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 116 0xf04>;
+ reg-io-width = <2>;
+ smsc,irq-push-pull;
+ };
+};
+
+&refclk {
+ clock-frequency = <50000000>;
+};
diff --git a/plat/arm/board/corstone700/corstone700_helpers.S b/plat/arm/board/corstone700/common/corstone700_helpers.S
similarity index 100%
rename from plat/arm/board/corstone700/corstone700_helpers.S
rename to plat/arm/board/corstone700/common/corstone700_helpers.S
diff --git a/plat/arm/board/corstone700/corstone700_plat.c b/plat/arm/board/corstone700/common/corstone700_plat.c
similarity index 86%
rename from plat/arm/board/corstone700/corstone700_plat.c
rename to plat/arm/board/corstone700/common/corstone700_plat.c
index e2ade70..629f076 100644
--- a/plat/arm/board/corstone700/corstone700_plat.c
+++ b/plat/arm/board/corstone700/common/corstone700_plat.c
@@ -18,6 +18,7 @@
const mmap_region_t plat_arm_mmap[] = {
ARM_MAP_SHARED_RAM,
+ ARM_MAP_NS_SHARED_RAM,
ARM_MAP_NS_DRAM1,
CORSTONE700_MAP_DEVICE,
{0}
@@ -33,5 +34,6 @@
unsigned int plat_get_syscnt_freq2(void)
{
- return CORSTONE700_TIMER_BASE_FREQUENCY;
+ /* Returning the Generic Timer Frequency */
+ return SYS_COUNTER_FREQ_IN_TICKS;
}
diff --git a/plat/arm/board/corstone700/corstone700_pm.c b/plat/arm/board/corstone700/common/corstone700_pm.c
similarity index 100%
rename from plat/arm/board/corstone700/corstone700_pm.c
rename to plat/arm/board/corstone700/common/corstone700_pm.c
diff --git a/plat/arm/board/corstone700/corstone700_security.c b/plat/arm/board/corstone700/common/corstone700_security.c
similarity index 100%
rename from plat/arm/board/corstone700/corstone700_security.c
rename to plat/arm/board/corstone700/common/corstone700_security.c
diff --git a/plat/arm/board/corstone700/corstone700_stack_protector.c b/plat/arm/board/corstone700/common/corstone700_stack_protector.c
similarity index 100%
rename from plat/arm/board/corstone700/corstone700_stack_protector.c
rename to plat/arm/board/corstone700/common/corstone700_stack_protector.c
diff --git a/plat/arm/board/corstone700/corstone700_topology.c b/plat/arm/board/corstone700/common/corstone700_topology.c
similarity index 100%
rename from plat/arm/board/corstone700/corstone700_topology.c
rename to plat/arm/board/corstone700/common/corstone700_topology.c
diff --git a/plat/arm/board/corstone700/drivers/mhu/mhu.c b/plat/arm/board/corstone700/common/drivers/mhu/mhu.c
similarity index 100%
rename from plat/arm/board/corstone700/drivers/mhu/mhu.c
rename to plat/arm/board/corstone700/common/drivers/mhu/mhu.c
diff --git a/plat/arm/board/corstone700/drivers/mhu/mhu.h b/plat/arm/board/corstone700/common/drivers/mhu/mhu.h
similarity index 100%
rename from plat/arm/board/corstone700/drivers/mhu/mhu.h
rename to plat/arm/board/corstone700/common/drivers/mhu/mhu.h
diff --git a/plat/arm/board/corstone700/include/platform_def.h b/plat/arm/board/corstone700/common/include/platform_def.h
similarity index 93%
rename from plat/arm/board/corstone700/include/platform_def.h
rename to plat/arm/board/corstone700/common/include/platform_def.h
index 7799cec..c92086c 100644
--- a/plat/arm/board/corstone700/include/platform_def.h
+++ b/plat/arm/board/corstone700/common/include/platform_def.h
@@ -67,6 +67,9 @@
#define ARM_BL_RAM_SIZE (PLAT_ARM_TRUSTED_SRAM_SIZE - \
ARM_SHARED_RAM_SIZE)
+#define ARM_NS_SHARED_RAM_BASE ARM_TRUSTED_SRAM_BASE + UL(0x00100000)
+#define ARM_NS_SHARED_RAM_SIZE 0x00300000
+
/*
* SP_MIN is the only BL image in SRAM. Allocate the whole of SRAM (excluding
* the page reserved for fw_configs) to BL32
@@ -111,7 +114,13 @@
#define ARM_SYS_CNTCTL_BASE UL(0x1a200000)
#define ARM_SYS_CNTREAD_BASE UL(0x1a210000)
#define ARM_SYS_TIMCTL_BASE UL(0x1a220000)
-#define CORSTONE700_TIMER_BASE_FREQUENCY UL(24000000)
+
+#ifdef TARGET_PLATFORM_FVP
+#define SYS_COUNTER_FREQ_IN_TICKS UL(50000000) /* 50MHz */
+#else
+#define SYS_COUNTER_FREQ_IN_TICKS UL(32000000) /* 32MHz */
+#endif
+
#define CORSTONE700_IRQ_TZ_WDOG 32
#define CORSTONE700_IRQ_SEC_SYS_TIMER 34
@@ -140,7 +149,7 @@
#define PLAT_ARM_TRUSTED_MAILBOX_BASE ARM_TRUSTED_SRAM_BASE
#define PLAT_ARM_NSTIMER_FRAME_ID U(1)
-#define PLAT_ARM_NS_IMAGE_OFFSET (ARM_DRAM1_BASE + UL(0x8000000))
+#define PLAT_ARM_NS_IMAGE_BASE (ARM_NS_SHARED_RAM_BASE)
#define PLAT_PHY_ADDR_SPACE_SIZE (1ULL << 32)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
@@ -162,7 +171,12 @@
#define ARM_MAP_SHARED_RAM MAP_REGION_FLAT( \
ARM_SHARED_RAM_BASE, \
ARM_SHARED_RAM_SIZE, \
- MT_DEVICE | MT_RW | MT_SECURE)
+ MT_MEMORY | MT_RW | MT_SECURE)
+
+#define ARM_MAP_NS_SHARED_RAM MAP_REGION_FLAT( \
+ ARM_NS_SHARED_RAM_BASE, \
+ ARM_NS_SHARED_RAM_SIZE, \
+ MT_MEMORY | MT_RW | MT_NS)
#define ARM_MAP_NS_DRAM1 MAP_REGION_FLAT( \
ARM_NS_DRAM1_BASE, \
diff --git a/plat/arm/board/corstone700/platform.mk b/plat/arm/board/corstone700/platform.mk
index a4d4f22..3398fba 100644
--- a/plat/arm/board/corstone700/platform.mk
+++ b/plat/arm/board/corstone700/platform.mk
@@ -4,6 +4,11 @@
# SPDX-License-Identifier: BSD-3-Clause
#
+# Making sure the corstone700 platform type is specified
+ifeq ($(filter ${TARGET_PLATFORM}, fpga fvp),)
+ $(error TARGET_PLATFORM must be fpga or fvp)
+endif
+
CORSTONE700_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S
BL32_SOURCES += plat/arm/common/aarch32/arm_helpers.S \
@@ -12,11 +17,11 @@
lib/xlat_tables/aarch32/xlat_tables.c \
lib/xlat_tables/xlat_tables_common.c \
${CORSTONE700_CPU_LIBS} \
- plat/arm/board/corstone700/drivers/mhu/mhu.c
+ plat/arm/board/corstone700/common/drivers/mhu/mhu.c
-PLAT_INCLUDES := -Iplat/arm/board/corstone700/include \
+PLAT_INCLUDES := -Iplat/arm/board/corstone700/common/include \
-Iinclude/plat/arm/common \
- -Iplat/arm/board/corstone700/drivers/mhu
+ -Iplat/arm/board/corstone700/common/drivers/mhu
NEED_BL32 := yes
@@ -30,13 +35,14 @@
override NEED_BL1 := no
override NEED_BL2 := no
override NEED_BL2U := no
+override NEED_BL33 := yes
#TFA for Corstone700 starts from BL32
override RESET_TO_SP_MIN := 1
#Device tree
-CORSTONE700_HW_CONFIG_DTS := fdts/corstone700.dts
-CORSTONE700_HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
+CORSTONE700_HW_CONFIG_DTS := fdts/corstone700_${TARGET_PLATFORM}.dts
+CORSTONE700_HW_CONFIG := ${BUILD_PLAT}/fdts/corstone700_${TARGET_PLATFORM}.dtb
FDT_SOURCES += ${CORSTONE700_HW_CONFIG_DTS}
$(eval CORSTONE700_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(CORSTONE700_HW_CONFIG_DTS)))
@@ -49,4 +55,8 @@
$(error "ARM_PRELOADED_DTB_BASE must be set if ARM_LINUX_KERNEL_AS_BL33 is used.")
endif
$(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
+
+# Adding TARGET_PLATFORM as a GCC define (-D option)
+$(eval $(call add_define,TARGET_PLATFORM_$(call uppercase,${TARGET_PLATFORM})))
+
include plat/arm/board/common/board_common.mk
diff --git a/plat/arm/board/corstone700/sp_min/sp_min-corstone700.mk b/plat/arm/board/corstone700/sp_min/sp_min-corstone700.mk
index acee6c3..75dc0f1 100644
--- a/plat/arm/board/corstone700/sp_min/sp_min-corstone700.mk
+++ b/plat/arm/board/corstone700/sp_min/sp_min-corstone700.mk
@@ -7,17 +7,17 @@
# SP_MIN source files specific to FVP platform
BL32_SOURCES += drivers/cfi/v2m/v2m_flash.c \
lib/utils/mem_region.c \
- plat/arm/board/corstone700/corstone700_helpers.S \
- plat/arm/board/corstone700/corstone700_topology.c \
- plat/arm/board/corstone700/corstone700_security.c \
- plat/arm/board/corstone700/corstone700_plat.c \
- plat/arm/board/corstone700/corstone700_pm.c \
+ plat/arm/board/corstone700/common/corstone700_helpers.S \
+ plat/arm/board/corstone700/common/corstone700_topology.c \
+ plat/arm/board/corstone700/common/corstone700_security.c \
+ plat/arm/board/corstone700/common/corstone700_plat.c \
+ plat/arm/board/corstone700/common/corstone700_pm.c \
plat/arm/board/corstone700/sp_min/corstone700_sp_min_setup.c \
${CORSTONE700_GIC_SOURCES}
ifneq (${ENABLE_STACK_PROTECTOR},0)
ifneq (${ENABLE_STACK_PROTECTOR},none)
- BL32_SOURCES += plat/arm/board/corstone700/corstone700_stack_protector.c
+ BL32_SOURCES += plat/arm/board/corstone700/common/corstone700_stack_protector.c
endif
endif