diff --git a/plat/intel/soc/agilex/include/socfpga_plat_def.h b/plat/intel/soc/agilex/include/socfpga_plat_def.h
index a01192d..ff7d971 100644
--- a/plat/intel/soc/agilex/include/socfpga_plat_def.h
+++ b/plat/intel/soc/agilex/include/socfpga_plat_def.h
@@ -77,6 +77,11 @@
 #define PLAT_UART1_BASE		(0xFFC02100)
 
 /*******************************************************************************
+ * WDT related constants
+ ******************************************************************************/
+#define WDT_BASE			(0xFFD00200)
+
+/*******************************************************************************
  * GIC related constants
  ******************************************************************************/
 #define PLAT_GIC_BASE			(0xFFFC0000)
diff --git a/plat/intel/soc/agilex5/include/socfpga_plat_def.h b/plat/intel/soc/agilex5/include/socfpga_plat_def.h
index f637a91..597612f 100644
--- a/plat/intel/soc/agilex5/include/socfpga_plat_def.h
+++ b/plat/intel/soc/agilex5/include/socfpga_plat_def.h
@@ -98,6 +98,11 @@
 #define PLAT_UART1_BASE						(0x10C02100)
 
 /*******************************************************************************
+ * WDT related constants
+ ******************************************************************************/
+#define WDT_BASE			(0x10D00200)
+
+/*******************************************************************************
  * GIC related constants
  ******************************************************************************/
 #define PLAT_GIC_BASE						(0x1D000000)
diff --git a/plat/intel/soc/common/drivers/wdt/watchdog.h b/plat/intel/soc/common/drivers/wdt/watchdog.h
index 4ee4cff..940ebf3 100644
--- a/plat/intel/soc/common/drivers/wdt/watchdog.h
+++ b/plat/intel/soc/common/drivers/wdt/watchdog.h
@@ -7,11 +7,8 @@
 #ifndef CAD_WATCHDOG_H
 #define CAD_WATCHDOG_H
 
-#if PLATFORM_MODEL == PLAT_SOCFPGA_AGILEX5
-#define WDT_BASE			(0x10D00200)
-#else
-#define WDT_BASE			(0xFFD00200)
-#endif
+#include "socfpga_plat_def.h"
+
 #define WDT_REG_SIZE_OFFSET		(0x4)
 #define WDT_MIN_CYCLES			(65536)
 #define WDT_PERIOD			(20)
diff --git a/plat/intel/soc/n5x/include/socfpga_plat_def.h b/plat/intel/soc/n5x/include/socfpga_plat_def.h
index a06bbc4..ae0229f 100644
--- a/plat/intel/soc/n5x/include/socfpga_plat_def.h
+++ b/plat/intel/soc/n5x/include/socfpga_plat_def.h
@@ -78,6 +78,11 @@
 #define PLAT_UART1_BASE		(0xFFC02100)
 
 /*******************************************************************************
+ * WDT related constants
+ ******************************************************************************/
+#define WDT_BASE			(0xFFD00200)
+
+/*******************************************************************************
  * GIC related constants
  ******************************************************************************/
 #define PLAT_GIC_BASE			(0xFFFC0000)
diff --git a/plat/intel/soc/stratix10/include/socfpga_plat_def.h b/plat/intel/soc/stratix10/include/socfpga_plat_def.h
index 03da8d9..112604f 100644
--- a/plat/intel/soc/stratix10/include/socfpga_plat_def.h
+++ b/plat/intel/soc/stratix10/include/socfpga_plat_def.h
@@ -76,6 +76,11 @@
 #define PLAT_UART1_BASE		(0xFFC02100)
 
 /*******************************************************************************
+ * WDT related constants
+ ******************************************************************************/
+#define WDT_BASE			(0xFFD00200)
+
+/*******************************************************************************
  * GIC related constants
  ******************************************************************************/
 #define PLAT_GIC_BASE			(0xFFFC0000)