diff --git a/plat/rockchip/rk3399/drivers/dram/dram.h b/plat/rockchip/rk3399/drivers/dram/dram.h
index fede7ee..0780fc3 100644
--- a/plat/rockchip/rk3399/drivers/dram/dram.h
+++ b/plat/rockchip/rk3399/drivers/dram/dram.h
@@ -25,10 +25,10 @@
 
 struct rk3399_ddr_publ_regs {
 	/*
-	 * PHY registers from 0 to 511.
-	 * Only registers 0-90 of each 128 register range are used.
+	 * PHY registers from 0 to 90 for slice1.
+	 * These are used to restore slice1-4 on resume.
 	 */
-	uint32_t phy0[4][91];
+	uint32_t phy0[91];
 	/*
 	 * PHY registers from 512 to 895.
 	 * Only registers 0-37 of each 128 register range are used.
diff --git a/plat/rockchip/rk3399/drivers/dram/suspend.c b/plat/rockchip/rk3399/drivers/dram/suspend.c
index 89f0cd3..7d4abf0 100644
--- a/plat/rockchip/rk3399/drivers/dram/suspend.c
+++ b/plat/rockchip/rk3399/drivers/dram/suspend.c
@@ -531,7 +531,7 @@
 
 	for (i = 0; i < 4; i++)
 		sram_regcpy(PHY_REG(ch, 128 * i),
-			    (uintptr_t)&phy_regs->phy0[i][0], 91);
+			    (uintptr_t)&phy_regs->phy0[0], 91);
 
 	for (i = 0; i < 3; i++)
 		sram_regcpy(PHY_REG(ch, 512 + 128 * i),
@@ -698,9 +698,8 @@
 	/* mask DENALI_PI_00_DATA.START, only copy here, will trigger later*/
 	params_pi[0] &= ~(0x1 << 0);
 
-	for (i = 0; i < 4; i++)
-		dram_regcpy((uintptr_t)&phy_regs->phy0[i][0],
-			    PHY_REG(0, 128 * i), 91);
+	dram_regcpy((uintptr_t)&phy_regs->phy0[0],
+			    PHY_REG(0, 0), 91);
 
 	for (i = 0; i < 3; i++)
 		dram_regcpy((uintptr_t)&phy_regs->phy512[i][0],