tree 81b19eef4cfb472bafb9f8afb7f2c0b4708e71ba
parent 69d299eb4471698e65e69aa2c829db35baeaa46c
author Ahmad Fatoum <a.fatoum@pengutronix.de> 1710265006 +0100
committer Ahmad Fatoum <a.fatoum@pengutronix.de> 1712067423 +0200

fix(pmu): fix breakage on ARMv7 CPUs with SP_min as BL32

While comments introduced with the original commit claim that
pmuv3_disable_el3()/pmuv3_init_el3() are compatible with PMUv2 and
PMUv1, this is not true in practice: The function accesses the Secure
Debug Control Register (SDCR), which only available to ARMv8 CPUs.

ARMv8 CPUs executing in AArch32 mode would thus be able to disable
their PMUv3, while ARMv7 CPUs would hang trying to access the SDCR.

Fix this by only doing PMUv3 handling when we know a PMUv3 to be
available. This resolves boot hanging on all STM32MP15 platforms
that use SP_min as BL32 instead of OP-TEE.

Change-Id: I40f7611cf46b89a30243cc55bf55a8d9c9de93c8
Fixes: c73686a11cea ("feat(pmu): introduce pmuv3 lib/extensions folder")
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>