| commit | 6e2fd8b32ed7079f976270ca48e5c8b42e9a981d | [log] [tgz] |
|---|---|---|
| author | Boyan Karatotev <boyan.karatotev@arm.com> | Mon Feb 13 16:38:37 2023 +0000 |
| committer | Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> | Mon Jul 24 11:04:38 2023 +0100 |
| tree | dc6636f9c2acb7a9d66f2097cf56ba31eb9e51b0 | |
| parent | fe1cd9447b8a722e4c99494166cdc9c717438850 [diff] |
fix(cm): set MDCR_EL3.{NSPBE, STE} explicitly
With the introduction of FEAT_RME MDCR_EL3 bits NSPB and NSPBE depend on
each other. The enable code relies on the register being initialised to
zero and omits to reset NSPBE. However, this is not obvious. Reset the
bit explicitly to document this.
Similarly, reset the STE bit , since it's part of the feature enablement.
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
Change-Id: I3714507bae10042cdccd2b7bc713b31d4cdeb02f