tree 9d5c4b8666dbabf4581bd4d378e4b44cb77ad197
parent 2f302d9763620b2460b56f03c143b86b85521b6b
author johpow01 <john.powell@arm.com> 1602024925 -0500
committer John_Powell <john.powell@arm.com> 1610474797 +0000

Workaround for Cortex A78 erratum 1941498

Cortex A78 erratum 1941498 is a Cat B erratum that applies to revisions
r0p0, r1p0, and r1p1.  The workaround is to set bit 8 in the ECTLR_EL1
register, there is a small performance cost (<0.5%) for setting this bit.

SDEN can be found here:
https://documentation-service.arm.com/static/5fb66157ca04df4095c1cc2e

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: I959cee8e3d46c1b84ff5e4409ce5945e459cc6a9