Merge pull request #1386 from soby-mathew/sm/dyn_bl31
Extend dynamic configuration
diff --git a/docs/user-guide.rst b/docs/user-guide.rst
index fbe258f..5f3823d 100644
--- a/docs/user-guide.rst
+++ b/docs/user-guide.rst
@@ -1209,6 +1209,10 @@
recommended to use the version that is packaged in the fip file using the
instructions below.
+Note: For the FVP, the kernel FDT is packaged in FIP during build and loaded
+by the firmware at runtime. See `Obtaining the Flattened Device Trees`_
+section for more info on selecting the right FDT to use.
+
#. Clean the working directory
::
@@ -1667,52 +1671,59 @@
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Depending on the FVP configuration and Linux configuration used, different
-FDT files are required. FDTs for the Foundation and Base FVPs can be found in
-the TF-A source directory under ``fdts/``. The Foundation FVP has a subset of
-the Base FVP components. For example, the Foundation FVP lacks CLCD and MMC
-support, and has only one CPU cluster.
+FDT files are required. FDT source files for the Foundation and Base FVPs can
+be found in the TF-A source directory under ``fdts/``. The Foundation FVP has
+a subset of the Base FVP components. For example, the Foundation FVP lacks
+CLCD and MMC support, and has only one CPU cluster.
Note: It is not recommended to use the FDTs built along the kernel because not
all FDTs are available from there.
-- ``fvp-base-gicv2-psci.dtb``
+The dynamic configuration capability is enabled in the firmware for FVPs.
+This means that the firmware can authenticate and load the FDT if present in
+FIP. A default FDT is packaged into FIP during the build based on
+the build configuration. This can be overridden by using the ``FVP_HW_CONFIG``
+or ``FVP_HW_CONFIG_DTS`` build options (refer to the
+`Arm FVP platform specific build options`_ section for detail on the options).
+
+- ``fvp-base-gicv2-psci.dts``
For use with models such as the Cortex-A57-A53 Base FVPs without shifted
affinities and with Base memory map configuration.
-- ``fvp-base-gicv2-psci-aarch32.dtb``
+- ``fvp-base-gicv2-psci-aarch32.dts``
For use with models such as the Cortex-A32 Base FVPs without shifted
affinities and running Linux in AArch32 state with Base memory map
configuration.
-- ``fvp-base-gicv3-psci.dtb``
+- ``fvp-base-gicv3-psci.dts``
For use with models such as the Cortex-A57-A53 Base FVPs without shifted
affinities and with Base memory map configuration and Linux GICv3 support.
-- ``fvp-base-gicv3-psci-1t.dtb``
+- ``fvp-base-gicv3-psci-1t.dts``
For use with models such as the AEMv8-RevC Base FVP with shifted affinities,
single threaded CPUs, Base memory map configuration and Linux GICv3 support.
-- ``fvp-base-gicv3-psci-dynamiq.dtb``
+- ``fvp-base-gicv3-psci-dynamiq.dts``
For use with models as the Cortex-A55-A75 Base FVPs with shifted affinities,
single cluster, single threaded CPUs, Base memory map configuration and Linux
GICv3 support.
-- ``fvp-base-gicv3-psci-aarch32.dtb``
+- ``fvp-base-gicv3-psci-aarch32.dts``
For use with models such as the Cortex-A32 Base FVPs without shifted
affinities and running Linux in AArch32 state with Base memory map
configuration and Linux GICv3 support.
-- ``fvp-foundation-gicv2-psci.dtb``
+- ``fvp-foundation-gicv2-psci.dts``
For use with Foundation FVP with Base memory map configuration.
-- ``fvp-foundation-gicv3-psci.dtb``
+- ``fvp-foundation-gicv3-psci.dts``
(Default) For use with Foundation FVP with Base memory map configuration
and Linux GICv3 support.
@@ -1733,7 +1744,6 @@
--gicv3 \
--data="<path-to>/<bl1-binary>"@0x0 \
--data="<path-to>/<FIP-binary>"@0x08000000 \
- --data="<path-to>/<fdt>"@0x82000000 \
--data="<path-to>/<kernel-binary>"@0x80080000 \
--data="<path-to>/<ramdisk-binary>"@0x84000000
@@ -1741,7 +1751,8 @@
- BL1 is loaded at the start of the Trusted ROM.
- The Firmware Image Package is loaded at the start of NOR FLASH0.
-- The Linux kernel image and device tree are loaded in DRAM.
+- The firmware loads the FDT packaged in FIP to the DRAM. The FDT load address
+ is specified via the ``hw_config_addr`` property in `TB_FW_CONFIG for FVP`_.
- The default use-case for the Foundation FVP is to use the ``--gicv3`` option
and enable the GICv3 device in the model. Note that without this option,
the Foundation FVP defaults to legacy (Versatile Express) memory map which
@@ -1770,7 +1781,6 @@
-C cache_state_modelled=1 \
-C bp.secureflashloader.fname="<path-to>/<bl1-binary>" \
-C bp.flashloader0.fname="<path-to>/<FIP-binary>" \
- --data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
--data cluster0.cpu0="<path-to>/<ramdisk>"@0x84000000
@@ -1799,7 +1809,6 @@
-C cluster1.cpu3.CONFIG64=0 \
-C bp.secureflashloader.fname="<path-to>/<bl1-binary>" \
-C bp.flashloader0.fname="<path-to>/<FIP-binary>" \
- --data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
--data cluster0.cpu0="<path-to>/<ramdisk>"@0x84000000
@@ -1818,7 +1827,6 @@
-C cache_state_modelled=1 \
-C bp.secureflashloader.fname="<path-to>/<bl1-binary>" \
-C bp.flashloader0.fname="<path-to>/<FIP-binary>" \
- --data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
--data cluster0.cpu0="<path-to>/<ramdisk>"@0x84000000
@@ -1837,7 +1845,6 @@
-C cache_state_modelled=1 \
-C bp.secureflashloader.fname="<path-to>/<bl1-binary>" \
-C bp.flashloader0.fname="<path-to>/<FIP-binary>" \
- --data cluster0.cpu0="<path-to>/<fdt>"@0x82000000 \
--data cluster0.cpu0="<path-to>/<kernel-binary>"@0x80080000 \
--data cluster0.cpu0="<path-to>/<ramdisk>"@0x84000000
@@ -1877,7 +1884,9 @@
``--data="<path-to><bl31|bl32|bl33-binary>"@<base-address-of-binary>``
parameter is needed to load the individual bootloader images in memory.
BL32 image is only needed if BL31 has been built to expect a Secure-EL1
- Payload.
+ Payload. For the same reason, the FDT needs to be compiled from the DT source
+ and loaded via the ``--data cluster0.cpu0="<path-to>/<fdt>"@0x82000000``
+ parameter.
- The ``-C cluster<X>.cpu<Y>.RVBAR=@<base-address-of-bl31>`` parameter, where
X and Y are the cluster and CPU numbers respectively, is used to set the
@@ -2035,6 +2044,7 @@
.. _Dia: https://wiki.gnome.org/Apps/Dia/Download
.. _here: psci-lib-integration-guide.rst
.. _Trusted Board Boot: trusted-board-boot.rst
+.. _TB_FW_CONFIG for FVP: ../plat/arm/board/fvp/fdts/fvp_tb_fw_config.dts
.. _Secure-EL1 Payloads and Dispatchers: firmware-design.rst#user-content-secure-el1-payloads-and-dispatchers
.. _Firmware Update: firmware-update.rst
.. _Firmware Design: firmware-design.rst
diff --git a/drivers/console/aarch64/multi_console.S b/drivers/console/aarch64/multi_console.S
index a85a6a5..0464776 100644
--- a/drivers/console/aarch64/multi_console.S
+++ b/drivers/console/aarch64/multi_console.S
@@ -200,7 +200,7 @@
cbz x14, putc_done
adrp x1, console_state
ldrb w1, [x1, :lo12:console_state]
- ldr x2, [x14, #CONSOLE_T_FLAGS]
+ ldr w2, [x14, #CONSOLE_T_FLAGS]
tst w1, w2
b.eq putc_continue
ldr x2, [x14, #CONSOLE_T_PUTC]
@@ -246,7 +246,7 @@
getc_loop:
adrp x0, console_state
ldrb w0, [x0, :lo12:console_state]
- ldr x1, [x14, #CONSOLE_T_FLAGS]
+ ldr w1, [x14, #CONSOLE_T_FLAGS]
tst w0, w1
b.eq getc_continue
ldr x1, [x14, #CONSOLE_T_GETC]
@@ -287,7 +287,7 @@
cbz x14, flush_done
adrp x1, console_state
ldrb w1, [x1, :lo12:console_state]
- ldr x2, [x14, #CONSOLE_T_FLAGS]
+ ldr w2, [x14, #CONSOLE_T_FLAGS]
tst w1, w2
b.eq flush_continue
ldr x1, [x14, #CONSOLE_T_FLUSH]
diff --git a/fdts/fvp-base-gicv2-psci-aarch32.dtb b/fdts/fvp-base-gicv2-psci-aarch32.dtb
deleted file mode 100644
index b044a76..0000000
--- a/fdts/fvp-base-gicv2-psci-aarch32.dtb
+++ /dev/null
Binary files differ
diff --git a/fdts/fvp-base-gicv2-psci.dtb b/fdts/fvp-base-gicv2-psci.dtb
deleted file mode 100644
index d86cb78..0000000
--- a/fdts/fvp-base-gicv2-psci.dtb
+++ /dev/null
Binary files differ
diff --git a/fdts/fvp-base-gicv3-psci-1t.dtb b/fdts/fvp-base-gicv3-psci-1t.dtb
deleted file mode 100644
index 23d360f..0000000
--- a/fdts/fvp-base-gicv3-psci-1t.dtb
+++ /dev/null
Binary files differ
diff --git a/fdts/fvp-base-gicv3-psci-aarch32.dtb b/fdts/fvp-base-gicv3-psci-aarch32.dtb
deleted file mode 100644
index 474b188..0000000
--- a/fdts/fvp-base-gicv3-psci-aarch32.dtb
+++ /dev/null
Binary files differ
diff --git a/fdts/fvp-base-gicv3-psci-dynamiq.dtb b/fdts/fvp-base-gicv3-psci-dynamiq.dtb
deleted file mode 100644
index 99c6b46..0000000
--- a/fdts/fvp-base-gicv3-psci-dynamiq.dtb
+++ /dev/null
Binary files differ
diff --git a/fdts/fvp-base-gicv3-psci.dtb b/fdts/fvp-base-gicv3-psci.dtb
deleted file mode 100644
index a105ae6..0000000
--- a/fdts/fvp-base-gicv3-psci.dtb
+++ /dev/null
Binary files differ
diff --git a/fdts/fvp-foundation-gicv2-psci.dtb b/fdts/fvp-foundation-gicv2-psci.dtb
deleted file mode 100644
index 9d0cb92..0000000
--- a/fdts/fvp-foundation-gicv2-psci.dtb
+++ /dev/null
Binary files differ
diff --git a/fdts/fvp-foundation-gicv3-psci.dtb b/fdts/fvp-foundation-gicv3-psci.dtb
deleted file mode 100644
index a3164ab..0000000
--- a/fdts/fvp-foundation-gicv3-psci.dtb
+++ /dev/null
Binary files differ
diff --git a/include/common/aarch64/el3_common_macros.S b/include/common/aarch64/el3_common_macros.S
index d5f527a..03b977e 100644
--- a/include/common/aarch64/el3_common_macros.S
+++ b/include/common/aarch64/el3_common_macros.S
@@ -20,7 +20,7 @@
*
* SCTLR_EL3.I: Enable the instruction cache.
*
- * SCTLR_EL3.SA: Enable Stack Aligment check. A SP alignment fault
+ * SCTLR_EL3.SA: Enable Stack Alignment check. A SP alignment fault
* exception is generated if a load or store instruction executed at
* EL3 uses the SP as the base address and the SP is not aligned to a
* 16-byte boundary.
@@ -186,7 +186,7 @@
* XN (Execute-never). Set to zero so that this control has no
* effect on memory access permissions.
*
- * SCTLR_EL3.SA: Set to zero to disable Stack Aligment check.
+ * SCTLR_EL3.SA: Set to zero to disable Stack Alignment check.
*
* SCTLR_EL3.A: Set to zero to disable Alignment fault checking.
* -------------------------------------------------------------
diff --git a/include/drivers/console.h b/include/drivers/console.h
index 0855170..a4d89fe 100644
--- a/include/drivers/console.h
+++ b/include/drivers/console.h
@@ -34,13 +34,17 @@
typedef struct console {
struct console *next;
+ /*
+ * Only the low 32 bits are used. The type is u_register_t to align the
+ * fields of the struct to 64 bits in AArch64 and 32 bits in AArch32
+ */
u_register_t flags;
int (*putc)(int character, struct console *console);
int (*getc)(struct console *console);
int (*flush)(struct console *console);
/* Additional private driver data may follow here. */
} console_t;
-#include <console_assertions.h> /* offset macro assertions for console_t */
+#include <console_assertions.h> /* offset macro assertions for console_t */
/*
* NOTE: There is no publicly accessible console_register() function. Consoles