Tegra194: config to enable/disable strict checking mode
This patch adds a new configuration option to the platform makefiles
that disables/enables strict checking mode. The config is enabled
by default.
Change-Id: I727dd0facee88d9517bf6956eaf9163eba25c8bb
Signed-off-by: Steven Kao <skao@nvidia.com>
diff --git a/plat/nvidia/tegra/soc/t194/drivers/mce/mce.c b/plat/nvidia/tegra/soc/t194/drivers/mce/mce.c
index ba8436b..c38099f 100644
--- a/plat/nvidia/tegra/soc/t194/drivers/mce/mce.c
+++ b/plat/nvidia/tegra/soc/t194/drivers/mce/mce.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2019-2020, NVIDIA CORPORATION. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -186,6 +186,7 @@
}
}
+#if ENABLE_STRICT_CHECKING_MODE
/*******************************************************************************
* Handler to enable the strict checking mode
******************************************************************************/
@@ -235,3 +236,4 @@
nvg_enable_strict_checking_mode();
}
}
+#endif
diff --git a/plat/nvidia/tegra/soc/t194/drivers/mce/nvg.c b/plat/nvidia/tegra/soc/t194/drivers/mce/nvg.c
index 536ed57..d6b5687 100644
--- a/plat/nvidia/tegra/soc/t194/drivers/mce/nvg.c
+++ b/plat/nvidia/tegra/soc/t194/drivers/mce/nvg.c
@@ -288,6 +288,7 @@
return ret;
}
+#if ENABLE_STRICT_CHECKING_MODE
/*
* Enable strict checking mode
*
@@ -300,3 +301,4 @@
nvg_set_request_data(TEGRA_NVG_CHANNEL_SECURITY_CONFIG, params);
}
+#endif
diff --git a/plat/nvidia/tegra/soc/t194/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t194/plat_psci_handlers.c
index 9a9113e..e2001b1 100644
--- a/plat/nvidia/tegra/soc/t194/plat_psci_handlers.c
+++ b/plat/nvidia/tegra/soc/t194/plat_psci_handlers.c
@@ -357,11 +357,13 @@
*/
if (stateid_afflvl2 == PSTATE_ID_SOC_POWERDN) {
+#if ENABLE_STRICT_CHECKING_MODE
/*
* Enable strict checking after programming the GSC for
* enabling TZSRAM and TZDRAM
*/
mce_enable_strict_checking();
+#endif
/* Init SMMU */
tegra_smmu_init();
diff --git a/plat/nvidia/tegra/soc/t194/plat_setup.c b/plat/nvidia/tegra/soc/t194/plat_setup.c
index 7dde9dd..3b58244 100644
--- a/plat/nvidia/tegra/soc/t194/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t194/plat_setup.c
@@ -293,9 +293,11 @@
void plat_late_platform_setup(void)
{
+#if ENABLE_STRICT_CHECKING_MODE
/*
* Enable strict checking after programming the GSC for
* enabling TZSRAM and TZDRAM
*/
mce_enable_strict_checking();
+#endif
}
diff --git a/plat/nvidia/tegra/soc/t194/platform_t194.mk b/plat/nvidia/tegra/soc/t194/platform_t194.mk
index 35b46a8..f114b7e 100644
--- a/plat/nvidia/tegra/soc/t194/platform_t194.mk
+++ b/plat/nvidia/tegra/soc/t194/platform_t194.mk
@@ -8,6 +8,9 @@
ENABLE_CONSOLE_SPE := 0
$(eval $(call add_define,ENABLE_CONSOLE_SPE))
+ENABLE_STRICT_CHECKING_MODE := 1
+$(eval $(call add_define,ENABLE_STRICT_CHECKING_MODE))
+
RESET_TO_BL31 := 1
PROGRAMMABLE_RESET_ADDRESS := 1