commit 8f14f6b3a32541e20e429cad978b838263d562fa
author Olivier Deprez <olivier.deprez@arm.com> Fri Sep 23 10:14:13 2022 +0200
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> Fri Sep 23 10:14:13 2022 +0200
tree f5de2405244c10b6bb4f6604fdadecd479e44f61
parent 462868c2bf650d9d2f244dac9e923b3a94d8fd6c
parent fb13a2325898ba765262b55b631d16e4077ae854

Merge "fix(bl31): fix validate_el3_interrupt_rm preprocessor usage" into integration

include/bl31/interrupt_mgmt.h

diff --git a/include/bl31/interrupt_mgmt.h b/include/bl31/interrupt_mgmt.h
index 694f1f0..21af112 100644
--- a/include/bl31/interrupt_mgmt.h
+++ b/include/bl31/interrupt_mgmt.h
@@ -107,7 +107,7 @@
 
 static inline int32_t validate_el3_interrupt_rm(uint32_t x)
 {
-#if defined (EL3_EXCEPTION_HANDLING) && !(defined(SPD_spmd) && (SPMD_SPM_AT_SEL2 == 1))
+#if EL3_EXCEPTION_HANDLING && !(defined(SPD_spmd) && (SPMD_SPM_AT_SEL2 == 1))
 	/*
 	 * With EL3 exception handling, EL3 interrupts are always routed to EL3
 	 * from both Secure and Non-secure, when the SPMC does not live in S-EL2.