diff --git a/plat/intel/soc/common/drivers/qspi/cadence_qspi.h b/plat/intel/soc/common/drivers/qspi/cadence_qspi.h
index 4fb2922..cfef585 100644
--- a/plat/intel/soc/common/drivers/qspi/cadence_qspi.h
+++ b/plat/intel/soc/common/drivers/qspi/cadence_qspi.h
@@ -34,7 +34,7 @@
 #define CAD_QSPI_CFG_CS(x)			(((x) << 11))
 #define CAD_QSPI_CFG_ENABLE			(1 << 0)
 #define CAD_QSPI_CFG_ENDMA_CLR_MSK		0xffff7fff
-#define CAD_QSPI_CFG_IDLE			(1 << 31)
+#define CAD_QSPI_CFG_IDLE			(1U << 31)
 #define CAD_QSPI_CFG_SELCLKPHASE_CLR_MSK	0xfffffffb
 #define CAD_QSPI_CFG_SELCLKPOL_CLR_MSK		0xfffffffd
 
diff --git a/plat/intel/soc/stratix10/include/s10_mailbox.h b/plat/intel/soc/stratix10/include/s10_mailbox.h
index 78db520..554c265 100644
--- a/plat/intel/soc/stratix10/include/s10_mailbox.h
+++ b/plat/intel/soc/stratix10/include/s10_mailbox.h
@@ -76,7 +76,7 @@
 #define RECONFIG_STATUS_STATE		0
 #define RECONFIG_STATUS_PIN_STATUS	2
 #define RECONFIG_STATUS_SOFTFUNC_STATUS 3
-#define PIN_STATUS_NSTATUS		(1 << 31)
+#define PIN_STATUS_NSTATUS		(1U << 31)
 #define SOFTFUNC_STATUS_SEU_ERROR	(1 << 3)
 #define SOFTFUNC_STATUS_INIT_DONE	(1 << 1)
 #define SOFTFUNC_STATUS_CONF_DONE	(1 << 0)