diff --git a/plat/arm/common/arm_bl1_setup.c b/plat/arm/common/arm_bl1_setup.c
index 8905bb0..b19a7c3 100644
--- a/plat/arm/common/arm_bl1_setup.c
+++ b/plat/arm/common/arm_bl1_setup.c
@@ -121,11 +121,11 @@
 	};
 
 	setup_page_tables(bl_regions, plat_arm_get_mmap());
-#ifdef AARCH32
-	enable_mmu_svc_mon(0);
-#else
+#ifdef __aarch64__
 	enable_mmu_el3(0);
-#endif /* AARCH32 */
+#else
+	enable_mmu_svc_mon(0);
+#endif /* __aarch64__ */
 
 	arm_setup_romlib();
 }
diff --git a/plat/arm/common/arm_bl2_el3_setup.c b/plat/arm/common/arm_bl2_el3_setup.c
index 0c01c87..97b5a88 100644
--- a/plat/arm/common/arm_bl2_el3_setup.c
+++ b/plat/arm/common/arm_bl2_el3_setup.c
@@ -83,10 +83,10 @@
 
 	setup_page_tables(bl_regions, plat_arm_get_mmap());
 
-#ifdef AARCH32
-	enable_mmu_svc_mon(0);
-#else
+#ifdef __aarch64__
 	enable_mmu_el3(0);
+#else
+	enable_mmu_svc_mon(0);
 #endif
 }
 
diff --git a/plat/arm/common/arm_bl2_setup.c b/plat/arm/common/arm_bl2_setup.c
index 32617f6..cdf87ca 100644
--- a/plat/arm/common/arm_bl2_setup.c
+++ b/plat/arm/common/arm_bl2_setup.c
@@ -128,10 +128,10 @@
 
 	setup_page_tables(bl_regions, plat_arm_get_mmap());
 
-#ifdef AARCH32
-	enable_mmu_svc_mon(0);
-#else
+#ifdef __aarch64__
 	enable_mmu_el1(0);
+#else
+	enable_mmu_svc_mon(0);
 #endif
 
 	arm_setup_romlib();
@@ -153,7 +153,7 @@
 	assert(bl_mem_params);
 
 	switch (image_id) {
-#ifdef AARCH64
+#ifdef __aarch64__
 	case BL32_IMAGE_ID:
 #ifdef SPD_opteed
 		pager_mem_params = get_bl_mem_params_node(BL32_EXTRA1_IMAGE_ID);
diff --git a/plat/arm/common/arm_bl2u_setup.c b/plat/arm/common/arm_bl2u_setup.c
index 9f44b9e..3614c7d 100644
--- a/plat/arm/common/arm_bl2u_setup.c
+++ b/plat/arm/common/arm_bl2u_setup.c
@@ -83,10 +83,10 @@
 
 	setup_page_tables(bl_regions, plat_arm_get_mmap());
 
-#ifdef AARCH32
-	enable_mmu_svc_mon(0);
-#else
+#ifdef __aarch64__
 	enable_mmu_el1(0);
+#else
+	enable_mmu_svc_mon(0);
 #endif
 	arm_setup_romlib();
 }
diff --git a/plat/arm/common/arm_common.c b/plat/arm/common/arm_common.c
index f5ce4d2..bc0cf9a 100644
--- a/plat/arm/common/arm_common.c
+++ b/plat/arm/common/arm_common.c
@@ -59,7 +59,7 @@
 /*******************************************************************************
  * Gets SPSR for BL33 entry
  ******************************************************************************/
-#ifndef AARCH32
+#ifdef __aarch64__
 uint32_t arm_get_spsr_for_bl33_entry(void)
 {
 	unsigned int mode;
@@ -97,7 +97,7 @@
 			SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS);
 	return spsr;
 }
-#endif /* AARCH32 */
+#endif /* __aarch64__ */
 
 /*******************************************************************************
  * Configures access to the system counter timer module.
diff --git a/plat/arm/common/arm_gicv3.c b/plat/arm/common/arm_gicv3.c
index 93bebf3..7f4957f 100644
--- a/plat/arm/common/arm_gicv3.c
+++ b/plat/arm/common/arm_gicv3.c
@@ -83,8 +83,8 @@
 	 * can use GIC system registers to manage interrupts and does
 	 * not need GIC interface base addresses to be configured.
 	 */
-#if (defined(AARCH32) && defined(IMAGE_BL32)) || \
-	(defined(IMAGE_BL31) && !defined(AARCH32))
+#if (!defined(__aarch64__) && defined(IMAGE_BL32)) || \
+	(defined(__aarch64__) && defined(IMAGE_BL31))
 	gicv3_driver_init(&arm_gic_data);
 #endif
 }
diff --git a/plat/arm/common/arm_nor_psci_mem_protect.c b/plat/arm/common/arm_nor_psci_mem_protect.c
index 3a70059..b9181eb 100644
--- a/plat/arm/common/arm_nor_psci_mem_protect.c
+++ b/plat/arm/common/arm_nor_psci_mem_protect.c
@@ -26,7 +26,7 @@
 
 static mem_region_t arm_ram_ranges[] = {
 	{DRAM1_NS_IMAGE_LIMIT, DRAM1_PROTECTED_SIZE},
-#ifdef AARCH64
+#ifdef __aarch64__
 	{ARM_DRAM2_BASE, 1u << ONE_GB_SHIFT},
 #endif
 };
diff --git a/plat/arm/common/arm_pm.c b/plat/arm/common/arm_pm.c
index cb87baf..c95f452 100644
--- a/plat/arm/common/arm_pm.c
+++ b/plat/arm/common/arm_pm.c
@@ -116,7 +116,7 @@
 			(ARM_NS_DRAM1_BASE + ARM_NS_DRAM1_SIZE))) {
 		return 0;
 	}
-#ifndef AARCH32
+#ifdef __aarch64__
 	if ((entrypoint >= ARM_DRAM2_BASE) && (entrypoint <
 			(ARM_DRAM2_BASE + ARM_DRAM2_SIZE))) {
 		return 0;
diff --git a/plat/arm/common/execution_state_switch.c b/plat/arm/common/execution_state_switch.c
index d471130..00ac16e 100644
--- a/plat/arm/common/execution_state_switch.c
+++ b/plat/arm/common/execution_state_switch.c
@@ -40,7 +40,7 @@
 		void *handle)
 {
 	/* Execution state can be switched only if EL3 is AArch64 */
-#ifdef AARCH64
+#ifdef __aarch64__
 	bool caller_64, thumb = false, from_el2;
 	unsigned int el, endianness;
 	u_register_t spsr, pc, scr, sctlr;
@@ -173,7 +173,7 @@
 	SMC_RET1(handle, STATE_SW_E_PARAM);
 
 exec_denied:
-#endif
+#endif /* __aarch64__ */
 	/* State switch denied */
 	SMC_RET1(handle, STATE_SW_E_DENIED);
 }