diff --git a/plat/intel/soc/common/include/platform_def.h b/plat/intel/soc/common/include/platform_def.h
index 8a681e6..046d138 100644
--- a/plat/intel/soc/common/include/platform_def.h
+++ b/plat/intel/soc/common/include/platform_def.h
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
- * Copyright (c) 2019, Intel Corporation. All rights reserved.
+ * Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2019-2020, Intel Corporation. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -169,6 +169,14 @@
 #define PLAT_UART_CLOCK		(100000000)
 
 /*******************************************************************************
+ * PHY related constants
+ ******************************************************************************/
+
+#define EMAC0_PHY_MODE			PHY_INTERFACE_MODE_RGMII
+#define EMAC1_PHY_MODE			PHY_INTERFACE_MODE_RGMII
+#define EMAC2_PHY_MODE			PHY_INTERFACE_MODE_RGMII
+
+/*******************************************************************************
  * System counter frequency related constants
  ******************************************************************************/
 #define PLAT_SYS_COUNTER_FREQ_IN_TICKS	(400000000)
diff --git a/plat/intel/soc/common/include/socfpga_emac.h b/plat/intel/soc/common/include/socfpga_emac.h
new file mode 100644
index 0000000..5b98006
--- /dev/null
+++ b/plat/intel/soc/common/include/socfpga_emac.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright (c) 2020, Intel Corporation. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef SOCFPGA_EMAC_H
+#define SOCFPGA_EMAC_H
+
+/* EMAC PHY Mode */
+
+#define PHY_INTERFACE_MODE_GMII_MII		0
+#define PHY_INTERFACE_MODE_RGMII		1
+#define PHY_INTERFACE_MODE_RMII			2
+#define PHY_INTERFACE_MODE_RESET		3
+
+/* Mask Definitions */
+
+#define PHY_INTF_SEL_MSK			0x3
+#define FPGAINTF_EN_3_EMAC_MSK(x)		(1 << (x * 8))
+
+void socfpga_emac_init(void);
+
+#endif /* SOCFPGA_EMAC_H */
diff --git a/plat/intel/soc/common/include/socfpga_system_manager.h b/plat/intel/soc/common/include/socfpga_system_manager.h
index 68e30b8..76565bc 100644
--- a/plat/intel/soc/common/include/socfpga_system_manager.h
+++ b/plat/intel/soc/common/include/socfpga_system_manager.h
@@ -13,6 +13,11 @@
 
 #define SOCFPGA_SYSMGR_SDMMC				0x28
 
+#define SOCFPGA_SYSMGR_EMAC_0				0x44
+#define SOCFPGA_SYSMGR_EMAC_1				0x48
+#define SOCFPGA_SYSMGR_EMAC_2				0x4c
+#define SOCFPGA_SYSMGR_FPGAINTF_EN_3			0x70
+
 #define SOCFPGA_SYSMGR_NOC_TIMEOUT			0xc0
 #define SOCFPGA_SYSMGR_NOC_IDLEREQ_SET			0xc4
 #define SOCFPGA_SYSMGR_NOC_IDLEREQ_CLR			0xc8