feat(imx8ulp): adjust the voltage when sys dvfs enabled
When system level DVFS is enabled, voltage can be changed to
optimize the power consumption.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Change-Id: Idfa0e637402078f3daf6e7c4ea1abb9af7675494
diff --git a/plat/imx/imx8ulp/upower/upower_hal.c b/plat/imx/imx8ulp/upower/upower_hal.c
index 45b59c2..337857b 100644
--- a/plat/imx/imx8ulp/upower/upower_hal.c
+++ b/plat/imx/imx8ulp/upower/upower_hal.c
@@ -145,3 +145,57 @@
return 0;
}
+
+int upower_pmic_i2c_write(uint32_t reg_addr, uint32_t reg_val)
+{
+ int ret, ret_val;
+ upwr_resp_t err_code;
+
+ ret = upwr_xcp_i2c_access(0x32, 1, 1, reg_addr, reg_val, NULL);
+ if (ret) {
+ WARN("pmic i2c read failed ret %d\n", ret);
+ return ret;
+ }
+
+ upower_wait_resp();
+ ret = upwr_poll_req_status(UPWR_SG_EXCEPT, NULL, &err_code, &ret_val, 1000);
+ if (ret != UPWR_REQ_OK) {
+ WARN("i2c poll Failure %d, err_code %d, ret_val 0x%x\n",
+ ret, err_code, ret_val);
+ return ret;
+ }
+
+ VERBOSE("PMIC write reg[0x%x], val[0x%x]\n", reg_addr, reg_val);
+
+ return 0;
+}
+
+int upower_pmic_i2c_read(uint32_t reg_addr, uint32_t *reg_val)
+{
+ int ret, ret_val;
+ upwr_resp_t err_code;
+
+ if (reg_val == NULL) {
+ return -1;
+ }
+
+ ret = upwr_xcp_i2c_access(0x32, -1, 1, reg_addr, 0, NULL);
+ if (ret) {
+ WARN("pmic i2c read failed ret %d\n", ret);
+ return ret;
+ }
+
+ upower_wait_resp();
+ ret = upwr_poll_req_status(UPWR_SG_EXCEPT, NULL, &err_code, &ret_val, 1000);
+ if (ret != UPWR_REQ_OK) {
+ WARN("i2c poll Failure %d, err_code %d, ret_val 0x%x\n",
+ ret, err_code, ret_val);
+ return ret;
+ }
+
+ *reg_val = ret_val;
+
+ VERBOSE("PMIC read reg[0x%x], val[0x%x]\n", reg_addr, *reg_val);
+
+ return 0;
+}