diff --git a/drivers/staging/renesas/rcar/pfc/E3/pfc_init_e3.c b/drivers/staging/renesas/rcar/pfc/E3/pfc_init_e3.c
index d29e0a3..a81a419 100644
--- a/drivers/staging/renesas/rcar/pfc/E3/pfc_init_e3.c
+++ b/drivers/staging/renesas/rcar/pfc/E3/pfc_init_e3.c
@@ -13,59 +13,59 @@
 /* PFC */
 #define GPSR0_SDA4		((uint32_t)1U << 17U)
 #define GPSR0_SCL4		((uint32_t)1U << 16U)
-#define	GPSR0_D15		((uint32_t)1U << 15U)
-#define	GPSR0_D14		((uint32_t)1U << 14U)
-#define	GPSR0_D13		((uint32_t)1U << 13U)
-#define	GPSR0_D12		((uint32_t)1U << 12U)
-#define	GPSR0_D11		((uint32_t)1U << 11U)
-#define	GPSR0_D10		((uint32_t)1U << 10U)
-#define	GPSR0_D9		((uint32_t)1U << 9U)
-#define	GPSR0_D8		((uint32_t)1U << 8U)
-#define	GPSR0_D7		((uint32_t)1U << 7U)
-#define	GPSR0_D6		((uint32_t)1U << 6U)
-#define	GPSR0_D5		((uint32_t)1U << 5U)
-#define	GPSR0_D4		((uint32_t)1U << 4U)
-#define	GPSR0_D3		((uint32_t)1U << 3U)
-#define	GPSR0_D2		((uint32_t)1U << 2U)
-#define	GPSR0_D1		((uint32_t)1U << 1U)
-#define	GPSR0_D0		((uint32_t)1U << 0U)
-#define	GPSR1_WE0		((uint32_t)1U << 22U)
-#define	GPSR1_CS0		((uint32_t)1U << 21U)
-#define	GPSR1_CLKOUT		((uint32_t)1U << 20U)
-#define	GPSR1_A19		((uint32_t)1U << 19U)
-#define	GPSR1_A18		((uint32_t)1U << 18U)
-#define	GPSR1_A17		((uint32_t)1U << 17U)
-#define	GPSR1_A16		((uint32_t)1U << 16U)
-#define	GPSR1_A15		((uint32_t)1U << 15U)
-#define	GPSR1_A14		((uint32_t)1U << 14U)
-#define	GPSR1_A13		((uint32_t)1U << 13U)
-#define	GPSR1_A12		((uint32_t)1U << 12U)
-#define	GPSR1_A11		((uint32_t)1U << 11U)
-#define	GPSR1_A10		((uint32_t)1U << 10U)
-#define	GPSR1_A9		((uint32_t)1U << 9U)
-#define	GPSR1_A8		((uint32_t)1U << 8U)
-#define	GPSR1_A7		((uint32_t)1U << 7U)
-#define	GPSR1_A6		((uint32_t)1U << 6U)
-#define	GPSR1_A5		((uint32_t)1U << 5U)
-#define	GPSR1_A4		((uint32_t)1U << 4U)
-#define	GPSR1_A3		((uint32_t)1U << 3U)
-#define	GPSR1_A2		((uint32_t)1U << 2U)
-#define	GPSR1_A1		((uint32_t)1U << 1U)
-#define	GPSR1_A0		((uint32_t)1U << 0U)
-#define	GPSR2_BIT27_REVERCED 	((uint32_t)1U << 27U)
-#define	GPSR2_BIT26_REVERCED 	((uint32_t)1U << 26U)
-#define	GPSR2_EX_WAIT0		((uint32_t)1U << 25U)
-#define	GPSR2_RD_WR		((uint32_t)1U << 24U)
-#define	GPSR2_RD		((uint32_t)1U << 23U)
-#define	GPSR2_BS		((uint32_t)1U << 22U)
-#define	GPSR2_AVB_PHY_INT	((uint32_t)1U << 21U)
+#define GPSR0_D15		((uint32_t)1U << 15U)
+#define GPSR0_D14		((uint32_t)1U << 14U)
+#define GPSR0_D13		((uint32_t)1U << 13U)
+#define GPSR0_D12		((uint32_t)1U << 12U)
+#define GPSR0_D11		((uint32_t)1U << 11U)
+#define GPSR0_D10		((uint32_t)1U << 10U)
+#define GPSR0_D9		((uint32_t)1U << 9U)
+#define GPSR0_D8		((uint32_t)1U << 8U)
+#define GPSR0_D7		((uint32_t)1U << 7U)
+#define GPSR0_D6		((uint32_t)1U << 6U)
+#define GPSR0_D5		((uint32_t)1U << 5U)
+#define GPSR0_D4		((uint32_t)1U << 4U)
+#define GPSR0_D3		((uint32_t)1U << 3U)
+#define GPSR0_D2		((uint32_t)1U << 2U)
+#define GPSR0_D1		((uint32_t)1U << 1U)
+#define GPSR0_D0		((uint32_t)1U << 0U)
+#define GPSR1_WE0		((uint32_t)1U << 22U)
+#define GPSR1_CS0		((uint32_t)1U << 21U)
+#define GPSR1_CLKOUT		((uint32_t)1U << 20U)
+#define GPSR1_A19		((uint32_t)1U << 19U)
+#define GPSR1_A18		((uint32_t)1U << 18U)
+#define GPSR1_A17		((uint32_t)1U << 17U)
+#define GPSR1_A16		((uint32_t)1U << 16U)
+#define GPSR1_A15		((uint32_t)1U << 15U)
+#define GPSR1_A14		((uint32_t)1U << 14U)
+#define GPSR1_A13		((uint32_t)1U << 13U)
+#define GPSR1_A12		((uint32_t)1U << 12U)
+#define GPSR1_A11		((uint32_t)1U << 11U)
+#define GPSR1_A10		((uint32_t)1U << 10U)
+#define GPSR1_A9		((uint32_t)1U << 9U)
+#define GPSR1_A8		((uint32_t)1U << 8U)
+#define GPSR1_A7		((uint32_t)1U << 7U)
+#define GPSR1_A6		((uint32_t)1U << 6U)
+#define GPSR1_A5		((uint32_t)1U << 5U)
+#define GPSR1_A4		((uint32_t)1U << 4U)
+#define GPSR1_A3		((uint32_t)1U << 3U)
+#define GPSR1_A2		((uint32_t)1U << 2U)
+#define GPSR1_A1		((uint32_t)1U << 1U)
+#define GPSR1_A0		((uint32_t)1U << 0U)
+#define GPSR2_BIT27_REVERCED 	((uint32_t)1U << 27U)
+#define GPSR2_BIT26_REVERCED 	((uint32_t)1U << 26U)
+#define GPSR2_EX_WAIT0		((uint32_t)1U << 25U)
+#define GPSR2_RD_WR		((uint32_t)1U << 24U)
+#define GPSR2_RD		((uint32_t)1U << 23U)
+#define GPSR2_BS		((uint32_t)1U << 22U)
+#define GPSR2_AVB_PHY_INT	((uint32_t)1U << 21U)
 #define GPSR2_AVB_TXCREFCLK	((uint32_t)1U << 20U)
-#define	GPSR2_AVB_RD3		((uint32_t)1U << 19U)
-#define	GPSR2_AVB_RD2		((uint32_t)1U << 18U)
-#define	GPSR2_AVB_RD1		((uint32_t)1U << 17U)
-#define	GPSR2_AVB_RD0		((uint32_t)1U << 16U)
-#define	GPSR2_AVB_RXC		((uint32_t)1U << 15U)
-#define	GPSR2_AVB_RX_CTL	((uint32_t)1U << 14U)
+#define GPSR2_AVB_RD3		((uint32_t)1U << 19U)
+#define GPSR2_AVB_RD2		((uint32_t)1U << 18U)
+#define GPSR2_AVB_RD1		((uint32_t)1U << 17U)
+#define GPSR2_AVB_RD0		((uint32_t)1U << 16U)
+#define GPSR2_AVB_RXC		((uint32_t)1U << 15U)
+#define GPSR2_AVB_RX_CTL	((uint32_t)1U << 14U)
 #define GPSR2_RPC_RESET		((uint32_t)1U << 13U)
 #define GPSR2_RPC_RPC_INT	((uint32_t)1U << 12U)
 #define GPSR2_QSPI1_SSL		((uint32_t)1U << 11U)
@@ -80,219 +80,219 @@
 #define GPSR2_QSPI0_MISO_IO1	((uint32_t)1U << 2U)
 #define GPSR2_QSPI0_MOSI_IO0	((uint32_t)1U << 1U)
 #define GPSR2_QSPI0_SPCLK	((uint32_t)1U << 0U)
-#define	GPSR3_SD1_WP		((uint32_t)1U << 15U)
-#define	GPSR3_SD1_CD		((uint32_t)1U << 14U)
-#define	GPSR3_SD0_WP		((uint32_t)1U << 13U)
-#define	GPSR3_SD0_CD		((uint32_t)1U << 12U)
-#define	GPSR3_SD1_DAT3		((uint32_t)1U << 11U)
-#define	GPSR3_SD1_DAT2		((uint32_t)1U << 10U)
-#define	GPSR3_SD1_DAT1		((uint32_t)1U << 9U)
-#define	GPSR3_SD1_DAT0		((uint32_t)1U << 8U)
-#define	GPSR3_SD1_CMD		((uint32_t)1U << 7U)
-#define	GPSR3_SD1_CLK		((uint32_t)1U << 6U)
-#define	GPSR3_SD0_DAT3		((uint32_t)1U << 5U)
-#define	GPSR3_SD0_DAT2		((uint32_t)1U << 4U)
-#define	GPSR3_SD0_DAT1		((uint32_t)1U << 3U)
-#define	GPSR3_SD0_DAT0		((uint32_t)1U << 2U)
-#define	GPSR3_SD0_CMD		((uint32_t)1U << 1U)
-#define	GPSR3_SD0_CLK		((uint32_t)1U << 0U)
-#define	GPSR4_SD3_DS		((uint32_t)1U << 10U)
-#define	GPSR4_SD3_DAT7		((uint32_t)1U << 9U)
-#define	GPSR4_SD3_DAT6		((uint32_t)1U << 8U)
-#define	GPSR4_SD3_DAT5		((uint32_t)1U << 7U)
-#define	GPSR4_SD3_DAT4		((uint32_t)1U << 6U)
-#define	GPSR4_SD3_DAT3		((uint32_t)1U << 5U)
-#define	GPSR4_SD3_DAT2		((uint32_t)1U << 4U)
-#define	GPSR4_SD3_DAT1		((uint32_t)1U << 3U)
-#define	GPSR4_SD3_DAT0		((uint32_t)1U << 2U)
-#define	GPSR4_SD3_CMD		((uint32_t)1U << 1U)
-#define	GPSR4_SD3_CLK		((uint32_t)1U << 0U)
-#define	GPSR5_MLB_DAT		((uint32_t)1U << 19U)
-#define	GPSR5_MLB_SIG		((uint32_t)1U << 18U)
-#define	GPSR5_MLB_CLK		((uint32_t)1U << 17U)
-#define	GPSR5_SSI_SDATA9	((uint32_t)1U << 16U)
-#define	GPSR5_MSIOF0_SS2	((uint32_t)1U << 15U)
-#define	GPSR5_MSIOF0_SS1	((uint32_t)1U << 14U)
-#define	GPSR5_MSIOF0_SYNC	((uint32_t)1U << 13U)
-#define	GPSR5_MSIOF0_TXD	((uint32_t)1U << 12U)
-#define	GPSR5_MSIOF0_RXD	((uint32_t)1U << 11U)
-#define	GPSR5_MSIOF0_SCK	((uint32_t)1U << 10U)
-#define	GPSR5_RX2_A		((uint32_t)1U << 9U)
-#define	GPSR5_TX2_A		((uint32_t)1U << 8U)
-#define	GPSR5_SCK2_A		((uint32_t)1U << 7U)
-#define	GPSR5_TX1		((uint32_t)1U << 6U)
-#define	GPSR5_RX1		((uint32_t)1U << 5U)
-#define	GPSR5_RTS0_TANS_A	((uint32_t)1U << 4U)
-#define	GPSR5_CTS0_A		((uint32_t)1U << 3U)
-#define	GPSR5_TX0_A		((uint32_t)1U << 2U)
-#define	GPSR5_RX0_A		((uint32_t)1U << 1U)
-#define	GPSR5_SCK0_A		((uint32_t)1U << 0U)
-#define	GPSR6_USB30_PWEN	((uint32_t)1U << 17U)
-#define	GPSR6_SSI_SDATA6	((uint32_t)1U << 16U)
-#define	GPSR6_SSI_WS6		((uint32_t)1U << 15U)
-#define	GPSR6_SSI_SCK6		((uint32_t)1U << 14U)
-#define	GPSR6_SSI_SDATA5	((uint32_t)1U << 13U)
-#define	GPSR6_SSI_WS5		((uint32_t)1U << 12U)
-#define	GPSR6_SSI_SCK5		((uint32_t)1U << 11U)
-#define	GPSR6_SSI_SDATA4	((uint32_t)1U << 10U)
-#define	GPSR6_USB30_OVC		((uint32_t)1U << 9U)
-#define	GPSR6_AUDIO_CLKA	((uint32_t)1U << 8U)
-#define	GPSR6_SSI_SDATA3	((uint32_t)1U << 7U)
-#define	GPSR6_SSI_WS349		((uint32_t)1U << 6U)
-#define	GPSR6_SSI_SCK349	((uint32_t)1U << 5U)
-#define	GPSR6_SSI_SDATA2	((uint32_t)1U << 4U)
-#define	GPSR6_SSI_SDATA1	((uint32_t)1U << 3U)
-#define	GPSR6_SSI_SDATA0	((uint32_t)1U << 2U)
-#define	GPSR6_SSI_WS01239	((uint32_t)1U << 1U)
-#define	GPSR6_SSI_SCK01239	((uint32_t)1U << 0U)
+#define GPSR3_SD1_WP		((uint32_t)1U << 15U)
+#define GPSR3_SD1_CD		((uint32_t)1U << 14U)
+#define GPSR3_SD0_WP		((uint32_t)1U << 13U)
+#define GPSR3_SD0_CD		((uint32_t)1U << 12U)
+#define GPSR3_SD1_DAT3		((uint32_t)1U << 11U)
+#define GPSR3_SD1_DAT2		((uint32_t)1U << 10U)
+#define GPSR3_SD1_DAT1		((uint32_t)1U << 9U)
+#define GPSR3_SD1_DAT0		((uint32_t)1U << 8U)
+#define GPSR3_SD1_CMD		((uint32_t)1U << 7U)
+#define GPSR3_SD1_CLK		((uint32_t)1U << 6U)
+#define GPSR3_SD0_DAT3		((uint32_t)1U << 5U)
+#define GPSR3_SD0_DAT2		((uint32_t)1U << 4U)
+#define GPSR3_SD0_DAT1		((uint32_t)1U << 3U)
+#define GPSR3_SD0_DAT0		((uint32_t)1U << 2U)
+#define GPSR3_SD0_CMD		((uint32_t)1U << 1U)
+#define GPSR3_SD0_CLK		((uint32_t)1U << 0U)
+#define GPSR4_SD3_DS		((uint32_t)1U << 10U)
+#define GPSR4_SD3_DAT7		((uint32_t)1U << 9U)
+#define GPSR4_SD3_DAT6		((uint32_t)1U << 8U)
+#define GPSR4_SD3_DAT5		((uint32_t)1U << 7U)
+#define GPSR4_SD3_DAT4		((uint32_t)1U << 6U)
+#define GPSR4_SD3_DAT3		((uint32_t)1U << 5U)
+#define GPSR4_SD3_DAT2		((uint32_t)1U << 4U)
+#define GPSR4_SD3_DAT1		((uint32_t)1U << 3U)
+#define GPSR4_SD3_DAT0		((uint32_t)1U << 2U)
+#define GPSR4_SD3_CMD		((uint32_t)1U << 1U)
+#define GPSR4_SD3_CLK		((uint32_t)1U << 0U)
+#define GPSR5_MLB_DAT		((uint32_t)1U << 19U)
+#define GPSR5_MLB_SIG		((uint32_t)1U << 18U)
+#define GPSR5_MLB_CLK		((uint32_t)1U << 17U)
+#define GPSR5_SSI_SDATA9	((uint32_t)1U << 16U)
+#define GPSR5_MSIOF0_SS2	((uint32_t)1U << 15U)
+#define GPSR5_MSIOF0_SS1	((uint32_t)1U << 14U)
+#define GPSR5_MSIOF0_SYNC	((uint32_t)1U << 13U)
+#define GPSR5_MSIOF0_TXD	((uint32_t)1U << 12U)
+#define GPSR5_MSIOF0_RXD	((uint32_t)1U << 11U)
+#define GPSR5_MSIOF0_SCK	((uint32_t)1U << 10U)
+#define GPSR5_RX2_A		((uint32_t)1U << 9U)
+#define GPSR5_TX2_A		((uint32_t)1U << 8U)
+#define GPSR5_SCK2_A		((uint32_t)1U << 7U)
+#define GPSR5_TX1		((uint32_t)1U << 6U)
+#define GPSR5_RX1		((uint32_t)1U << 5U)
+#define GPSR5_RTS0_TANS_A	((uint32_t)1U << 4U)
+#define GPSR5_CTS0_A		((uint32_t)1U << 3U)
+#define GPSR5_TX0_A		((uint32_t)1U << 2U)
+#define GPSR5_RX0_A		((uint32_t)1U << 1U)
+#define GPSR5_SCK0_A		((uint32_t)1U << 0U)
+#define GPSR6_USB30_PWEN	((uint32_t)1U << 17U)
+#define GPSR6_SSI_SDATA6	((uint32_t)1U << 16U)
+#define GPSR6_SSI_WS6		((uint32_t)1U << 15U)
+#define GPSR6_SSI_SCK6		((uint32_t)1U << 14U)
+#define GPSR6_SSI_SDATA5	((uint32_t)1U << 13U)
+#define GPSR6_SSI_WS5		((uint32_t)1U << 12U)
+#define GPSR6_SSI_SCK5		((uint32_t)1U << 11U)
+#define GPSR6_SSI_SDATA4	((uint32_t)1U << 10U)
+#define GPSR6_USB30_OVC		((uint32_t)1U << 9U)
+#define GPSR6_AUDIO_CLKA	((uint32_t)1U << 8U)
+#define GPSR6_SSI_SDATA3	((uint32_t)1U << 7U)
+#define GPSR6_SSI_WS349		((uint32_t)1U << 6U)
+#define GPSR6_SSI_SCK349	((uint32_t)1U << 5U)
+#define GPSR6_SSI_SDATA2	((uint32_t)1U << 4U)
+#define GPSR6_SSI_SDATA1	((uint32_t)1U << 3U)
+#define GPSR6_SSI_SDATA0	((uint32_t)1U << 2U)
+#define GPSR6_SSI_WS01239	((uint32_t)1U << 1U)
+#define GPSR6_SSI_SCK01239	((uint32_t)1U << 0U)
 
-#define	IPSR_28_FUNC(x)		((uint32_t)(x) << 28U)
-#define	IPSR_24_FUNC(x)		((uint32_t)(x) << 24U)
-#define	IPSR_20_FUNC(x)		((uint32_t)(x) << 20U)
-#define	IPSR_16_FUNC(x)		((uint32_t)(x) << 16U)
-#define	IPSR_12_FUNC(x)		((uint32_t)(x) << 12U)
-#define	IPSR_8_FUNC(x)		((uint32_t)(x) << 8U)
-#define	IPSR_4_FUNC(x)		((uint32_t)(x) << 4U)
-#define	IPSR_0_FUNC(x)		((uint32_t)(x) << 0U)
+#define IPSR_28_FUNC(x)		((uint32_t)(x) << 28U)
+#define IPSR_24_FUNC(x)		((uint32_t)(x) << 24U)
+#define IPSR_20_FUNC(x)		((uint32_t)(x) << 20U)
+#define IPSR_16_FUNC(x)		((uint32_t)(x) << 16U)
+#define IPSR_12_FUNC(x)		((uint32_t)(x) << 12U)
+#define IPSR_8_FUNC(x)		((uint32_t)(x) << 8U)
+#define IPSR_4_FUNC(x)		((uint32_t)(x) << 4U)
+#define IPSR_0_FUNC(x)		((uint32_t)(x) << 0U)
 
 #define IOCTRL30_MASK		(0x0007F000U)
-#define	POC_SD3_DS_33V		((uint32_t)1U << 29U)
-#define	POC_SD3_DAT7_33V	((uint32_t)1U << 28U)
-#define	POC_SD3_DAT6_33V	((uint32_t)1U << 27U)
-#define	POC_SD3_DAT5_33V	((uint32_t)1U << 26U)
-#define	POC_SD3_DAT4_33V	((uint32_t)1U << 25U)
-#define	POC_SD3_DAT3_33V	((uint32_t)1U << 24U)
-#define	POC_SD3_DAT2_33V	((uint32_t)1U << 23U)
-#define	POC_SD3_DAT1_33V	((uint32_t)1U << 22U)
-#define	POC_SD3_DAT0_33V	((uint32_t)1U << 21U)
-#define	POC_SD3_CMD_33V		((uint32_t)1U << 20U)
-#define	POC_SD3_CLK_33V		((uint32_t)1U << 19U)
-#define	POC_SD1_DAT3_33V	((uint32_t)1U << 11U)
-#define	POC_SD1_DAT2_33V	((uint32_t)1U << 10U)
-#define	POC_SD1_DAT1_33V	((uint32_t)1U << 9U)
-#define	POC_SD1_DAT0_33V	((uint32_t)1U << 8U)
-#define	POC_SD1_CMD_33V		((uint32_t)1U << 7U)
-#define	POC_SD1_CLK_33V		((uint32_t)1U << 6U)
-#define	POC_SD0_DAT3_33V	((uint32_t)1U << 5U)
-#define	POC_SD0_DAT2_33V	((uint32_t)1U << 4U)
-#define	POC_SD0_DAT1_33V	((uint32_t)1U << 3U)
-#define	POC_SD0_DAT0_33V	((uint32_t)1U << 2U)
-#define	POC_SD0_CMD_33V		((uint32_t)1U << 1U)
-#define	POC_SD0_CLK_33V		((uint32_t)1U << 0U)
+#define POC_SD3_DS_33V		((uint32_t)1U << 29U)
+#define POC_SD3_DAT7_33V	((uint32_t)1U << 28U)
+#define POC_SD3_DAT6_33V	((uint32_t)1U << 27U)
+#define POC_SD3_DAT5_33V	((uint32_t)1U << 26U)
+#define POC_SD3_DAT4_33V	((uint32_t)1U << 25U)
+#define POC_SD3_DAT3_33V	((uint32_t)1U << 24U)
+#define POC_SD3_DAT2_33V	((uint32_t)1U << 23U)
+#define POC_SD3_DAT1_33V	((uint32_t)1U << 22U)
+#define POC_SD3_DAT0_33V	((uint32_t)1U << 21U)
+#define POC_SD3_CMD_33V		((uint32_t)1U << 20U)
+#define POC_SD3_CLK_33V		((uint32_t)1U << 19U)
+#define POC_SD1_DAT3_33V	((uint32_t)1U << 11U)
+#define POC_SD1_DAT2_33V	((uint32_t)1U << 10U)
+#define POC_SD1_DAT1_33V	((uint32_t)1U << 9U)
+#define POC_SD1_DAT0_33V	((uint32_t)1U << 8U)
+#define POC_SD1_CMD_33V		((uint32_t)1U << 7U)
+#define POC_SD1_CLK_33V		((uint32_t)1U << 6U)
+#define POC_SD0_DAT3_33V	((uint32_t)1U << 5U)
+#define POC_SD0_DAT2_33V	((uint32_t)1U << 4U)
+#define POC_SD0_DAT1_33V	((uint32_t)1U << 3U)
+#define POC_SD0_DAT0_33V	((uint32_t)1U << 2U)
+#define POC_SD0_CMD_33V		((uint32_t)1U << 1U)
+#define POC_SD0_CLK_33V		((uint32_t)1U << 0U)
 
 #define IOCTRL32_MASK		(0xFFFFFFFEU)
 #define POC2_VREF_33V		((uint32_t)1U << 0U)
 
-#define	MOD_SEL0_ADGB_A		((uint32_t)0U << 29U)
-#define	MOD_SEL0_ADGB_B		((uint32_t)1U << 29U)
-#define	MOD_SEL0_ADGB_C		((uint32_t)2U << 29U)
-#define	MOD_SEL0_DRIF0_A	((uint32_t)0U << 28U)
-#define	MOD_SEL0_DRIF0_B	((uint32_t)1U << 28U)
-#define	MOD_SEL0_FM_A		((uint32_t)0U << 26U)
-#define	MOD_SEL0_FM_B		((uint32_t)1U << 26U)
-#define	MOD_SEL0_FM_C		((uint32_t)2U << 26U)
-#define	MOD_SEL0_FSO_A		((uint32_t)0U << 25U)
-#define	MOD_SEL0_FSO_B		((uint32_t)1U << 25U)
-#define	MOD_SEL0_HSCIF0_A	((uint32_t)0U << 24U)
-#define	MOD_SEL0_HSCIF0_B	((uint32_t)1U << 24U)
-#define	MOD_SEL0_HSCIF1_A	((uint32_t)0U << 23U)
-#define	MOD_SEL0_HSCIF1_B	((uint32_t)1U << 23U)
-#define	MOD_SEL0_HSCIF2_A	((uint32_t)0U << 22U)
-#define	MOD_SEL0_HSCIF2_B	((uint32_t)1U << 22U)
-#define	MOD_SEL0_I2C1_A		((uint32_t)0U << 20U)
-#define	MOD_SEL0_I2C1_B		((uint32_t)1U << 20U)
-#define	MOD_SEL0_I2C1_C		((uint32_t)2U << 20U)
-#define	MOD_SEL0_I2C1_D		((uint32_t)3U << 20U)
-#define	MOD_SEL0_I2C2_A		((uint32_t)0U << 17U)
-#define	MOD_SEL0_I2C2_B		((uint32_t)1U << 17U)
-#define	MOD_SEL0_I2C2_C		((uint32_t)2U << 17U)
-#define	MOD_SEL0_I2C2_D		((uint32_t)3U << 17U)
-#define	MOD_SEL0_I2C2_E		((uint32_t)4U << 17U)
-#define	MOD_SEL0_NDFC_A		((uint32_t)0U << 16U)
-#define	MOD_SEL0_NDFC_B		((uint32_t)1U << 16U)
-#define	MOD_SEL0_PWM0_A		((uint32_t)0U << 15U)
-#define	MOD_SEL0_PWM0_B		((uint32_t)1U << 15U)
-#define	MOD_SEL0_PWM1_A		((uint32_t)0U << 14U)
-#define	MOD_SEL0_PWM1_B		((uint32_t)1U << 14U)
-#define	MOD_SEL0_PWM2_A		((uint32_t)0U << 12U)
-#define	MOD_SEL0_PWM2_B		((uint32_t)1U << 12U)
-#define	MOD_SEL0_PWM2_C		((uint32_t)2U << 12U)
-#define	MOD_SEL0_PWM3_A		((uint32_t)0U << 10U)
-#define	MOD_SEL0_PWM3_B		((uint32_t)1U << 10U)
-#define	MOD_SEL0_PWM3_C		((uint32_t)2U << 10U)
-#define	MOD_SEL0_PWM4_A		((uint32_t)0U << 9U)
-#define	MOD_SEL0_PWM4_B		((uint32_t)1U << 9U)
-#define	MOD_SEL0_PWM5_A		((uint32_t)0U << 8U)
-#define	MOD_SEL0_PWM5_B		((uint32_t)1U << 8U)
-#define	MOD_SEL0_PWM6_A		((uint32_t)0U << 7U)
-#define	MOD_SEL0_PWM6_B		((uint32_t)1U << 7U)
-#define	MOD_SEL0_REMOCON_A	((uint32_t)0U << 5U)
-#define	MOD_SEL0_REMOCON_B	((uint32_t)1U << 5U)
-#define	MOD_SEL0_REMOCON_C	((uint32_t)2U << 5U)
-#define	MOD_SEL0_SCIF_A		((uint32_t)0U << 4U)
-#define	MOD_SEL0_SCIF_B		((uint32_t)1U << 4U)
-#define	MOD_SEL0_SCIF0_A	((uint32_t)0U << 3U)
-#define	MOD_SEL0_SCIF0_B	((uint32_t)1U << 3U)
-#define	MOD_SEL0_SCIF2_A	((uint32_t)0U << 2U)
-#define	MOD_SEL0_SCIF2_B	((uint32_t)1U << 2U)
-#define	MOD_SEL0_SPEED_PULSE_IF_A	((uint32_t)0U << 0U)
-#define	MOD_SEL0_SPEED_PULSE_IF_B	((uint32_t)1U << 0U)
-#define	MOD_SEL0_SPEED_PULSE_IF_C	((uint32_t)2U << 0U)
-#define	MOD_SEL1_SIMCARD_A	((uint32_t)0U << 31U)
-#define	MOD_SEL1_SIMCARD_B	((uint32_t)1U << 31U)
-#define	MOD_SEL1_SSI2_A		((uint32_t)0U << 30U)
-#define	MOD_SEL1_SSI2_B		((uint32_t)1U << 30U)
-#define	MOD_SEL1_TIMER_TMU_A	((uint32_t)0U << 29U)
-#define	MOD_SEL1_TIMER_TMU_B	((uint32_t)1U << 29U)
+#define MOD_SEL0_ADGB_A		((uint32_t)0U << 29U)
+#define MOD_SEL0_ADGB_B		((uint32_t)1U << 29U)
+#define MOD_SEL0_ADGB_C		((uint32_t)2U << 29U)
+#define MOD_SEL0_DRIF0_A	((uint32_t)0U << 28U)
+#define MOD_SEL0_DRIF0_B	((uint32_t)1U << 28U)
+#define MOD_SEL0_FM_A		((uint32_t)0U << 26U)
+#define MOD_SEL0_FM_B		((uint32_t)1U << 26U)
+#define MOD_SEL0_FM_C		((uint32_t)2U << 26U)
+#define MOD_SEL0_FSO_A		((uint32_t)0U << 25U)
+#define MOD_SEL0_FSO_B		((uint32_t)1U << 25U)
+#define MOD_SEL0_HSCIF0_A	((uint32_t)0U << 24U)
+#define MOD_SEL0_HSCIF0_B	((uint32_t)1U << 24U)
+#define MOD_SEL0_HSCIF1_A	((uint32_t)0U << 23U)
+#define MOD_SEL0_HSCIF1_B	((uint32_t)1U << 23U)
+#define MOD_SEL0_HSCIF2_A	((uint32_t)0U << 22U)
+#define MOD_SEL0_HSCIF2_B	((uint32_t)1U << 22U)
+#define MOD_SEL0_I2C1_A		((uint32_t)0U << 20U)
+#define MOD_SEL0_I2C1_B		((uint32_t)1U << 20U)
+#define MOD_SEL0_I2C1_C		((uint32_t)2U << 20U)
+#define MOD_SEL0_I2C1_D		((uint32_t)3U << 20U)
+#define MOD_SEL0_I2C2_A		((uint32_t)0U << 17U)
+#define MOD_SEL0_I2C2_B		((uint32_t)1U << 17U)
+#define MOD_SEL0_I2C2_C		((uint32_t)2U << 17U)
+#define MOD_SEL0_I2C2_D		((uint32_t)3U << 17U)
+#define MOD_SEL0_I2C2_E		((uint32_t)4U << 17U)
+#define MOD_SEL0_NDFC_A		((uint32_t)0U << 16U)
+#define MOD_SEL0_NDFC_B		((uint32_t)1U << 16U)
+#define MOD_SEL0_PWM0_A		((uint32_t)0U << 15U)
+#define MOD_SEL0_PWM0_B		((uint32_t)1U << 15U)
+#define MOD_SEL0_PWM1_A		((uint32_t)0U << 14U)
+#define MOD_SEL0_PWM1_B		((uint32_t)1U << 14U)
+#define MOD_SEL0_PWM2_A		((uint32_t)0U << 12U)
+#define MOD_SEL0_PWM2_B		((uint32_t)1U << 12U)
+#define MOD_SEL0_PWM2_C		((uint32_t)2U << 12U)
+#define MOD_SEL0_PWM3_A		((uint32_t)0U << 10U)
+#define MOD_SEL0_PWM3_B		((uint32_t)1U << 10U)
+#define MOD_SEL0_PWM3_C		((uint32_t)2U << 10U)
+#define MOD_SEL0_PWM4_A		((uint32_t)0U << 9U)
+#define MOD_SEL0_PWM4_B		((uint32_t)1U << 9U)
+#define MOD_SEL0_PWM5_A		((uint32_t)0U << 8U)
+#define MOD_SEL0_PWM5_B		((uint32_t)1U << 8U)
+#define MOD_SEL0_PWM6_A		((uint32_t)0U << 7U)
+#define MOD_SEL0_PWM6_B		((uint32_t)1U << 7U)
+#define MOD_SEL0_REMOCON_A	((uint32_t)0U << 5U)
+#define MOD_SEL0_REMOCON_B	((uint32_t)1U << 5U)
+#define MOD_SEL0_REMOCON_C	((uint32_t)2U << 5U)
+#define MOD_SEL0_SCIF_A		((uint32_t)0U << 4U)
+#define MOD_SEL0_SCIF_B		((uint32_t)1U << 4U)
+#define MOD_SEL0_SCIF0_A	((uint32_t)0U << 3U)
+#define MOD_SEL0_SCIF0_B	((uint32_t)1U << 3U)
+#define MOD_SEL0_SCIF2_A	((uint32_t)0U << 2U)
+#define MOD_SEL0_SCIF2_B	((uint32_t)1U << 2U)
+#define MOD_SEL0_SPEED_PULSE_IF_A	((uint32_t)0U << 0U)
+#define MOD_SEL0_SPEED_PULSE_IF_B	((uint32_t)1U << 0U)
+#define MOD_SEL0_SPEED_PULSE_IF_C	((uint32_t)2U << 0U)
+#define MOD_SEL1_SIMCARD_A	((uint32_t)0U << 31U)
+#define MOD_SEL1_SIMCARD_B	((uint32_t)1U << 31U)
+#define MOD_SEL1_SSI2_A		((uint32_t)0U << 30U)
+#define MOD_SEL1_SSI2_B		((uint32_t)1U << 30U)
+#define MOD_SEL1_TIMER_TMU_A	((uint32_t)0U << 29U)
+#define MOD_SEL1_TIMER_TMU_B	((uint32_t)1U << 29U)
 #define MOD_SEL1_USB20_CH0_A	((uint32_t)0U << 28U)
 #define MOD_SEL1_USB20_CH0_B	((uint32_t)1U << 28U)
-#define	MOD_SEL1_DRIF2_A	((uint32_t)0U << 26U)
-#define	MOD_SEL1_DRIF2_B	((uint32_t)1U << 26U)
-#define	MOD_SEL1_DRIF3_A	((uint32_t)0U << 25U)
-#define	MOD_SEL1_DRIF3_B	((uint32_t)1U << 25U)
-#define	MOD_SEL1_HSCIF3_A	((uint32_t)0U << 22U)
-#define	MOD_SEL1_HSCIF3_B	((uint32_t)1U << 22U)
-#define	MOD_SEL1_HSCIF3_C	((uint32_t)2U << 22U)
-#define	MOD_SEL1_HSCIF3_D	((uint32_t)3U << 22U)
-#define	MOD_SEL1_HSCIF3_E	((uint32_t)4U << 22U)
-#define	MOD_SEL1_HSCIF4_A	((uint32_t)0U << 19U)
-#define	MOD_SEL1_HSCIF4_B	((uint32_t)1U << 19U)
-#define	MOD_SEL1_HSCIF4_C	((uint32_t)2U << 19U)
-#define	MOD_SEL1_HSCIF4_D	((uint32_t)3U << 19U)
-#define	MOD_SEL1_HSCIF4_E	((uint32_t)4U << 19U)
-#define	MOD_SEL1_I2C6_A		((uint32_t)0U << 18U)
-#define	MOD_SEL1_I2C6_B		((uint32_t)1U << 18U)
-#define	MOD_SEL1_I2C7_A		((uint32_t)0U << 17U)
-#define	MOD_SEL1_I2C7_B		((uint32_t)1U << 17U)
-#define	MOD_SEL1_MSIOF2_A	((uint32_t)0U << 16U)
-#define	MOD_SEL1_MSIOF2_B	((uint32_t)1U << 16U)
-#define	MOD_SEL1_MSIOF3_A	((uint32_t)0U << 15U)
-#define	MOD_SEL1_MSIOF3_B	((uint32_t)1U << 15U)
-#define	MOD_SEL1_SCIF3_A	((uint32_t)0U << 13U)
-#define	MOD_SEL1_SCIF3_B	((uint32_t)1U << 13U)
-#define	MOD_SEL1_SCIF3_C	((uint32_t)2U << 13U)
-#define	MOD_SEL1_SCIF4_A	((uint32_t)0U << 11U)
-#define	MOD_SEL1_SCIF4_B	((uint32_t)1U << 11U)
-#define	MOD_SEL1_SCIF4_C	((uint32_t)2U << 11U)
-#define	MOD_SEL1_SCIF5_A	((uint32_t)0U << 9U)
-#define	MOD_SEL1_SCIF5_B	((uint32_t)1U << 9U)
-#define	MOD_SEL1_SCIF5_C	((uint32_t)2U << 9U)
-#define	MOD_SEL1_VIN4_A		((uint32_t)0U << 8U)
-#define	MOD_SEL1_VIN4_B		((uint32_t)1U << 8U)
-#define	MOD_SEL1_VIN5_A		((uint32_t)0U << 7U)
-#define	MOD_SEL1_VIN5_B		((uint32_t)1U << 7U)
-#define	MOD_SEL1_ADGC_A		((uint32_t)0U << 5U)
-#define	MOD_SEL1_ADGC_B		((uint32_t)1U << 5U)
-#define	MOD_SEL1_ADGC_C		((uint32_t)2U << 5U)
-#define	MOD_SEL1_SSI9_A		((uint32_t)0U << 4U)
-#define	MOD_SEL1_SSI9_B		((uint32_t)1U << 4U)
+#define MOD_SEL1_DRIF2_A	((uint32_t)0U << 26U)
+#define MOD_SEL1_DRIF2_B	((uint32_t)1U << 26U)
+#define MOD_SEL1_DRIF3_A	((uint32_t)0U << 25U)
+#define MOD_SEL1_DRIF3_B	((uint32_t)1U << 25U)
+#define MOD_SEL1_HSCIF3_A	((uint32_t)0U << 22U)
+#define MOD_SEL1_HSCIF3_B	((uint32_t)1U << 22U)
+#define MOD_SEL1_HSCIF3_C	((uint32_t)2U << 22U)
+#define MOD_SEL1_HSCIF3_D	((uint32_t)3U << 22U)
+#define MOD_SEL1_HSCIF3_E	((uint32_t)4U << 22U)
+#define MOD_SEL1_HSCIF4_A	((uint32_t)0U << 19U)
+#define MOD_SEL1_HSCIF4_B	((uint32_t)1U << 19U)
+#define MOD_SEL1_HSCIF4_C	((uint32_t)2U << 19U)
+#define MOD_SEL1_HSCIF4_D	((uint32_t)3U << 19U)
+#define MOD_SEL1_HSCIF4_E	((uint32_t)4U << 19U)
+#define MOD_SEL1_I2C6_A		((uint32_t)0U << 18U)
+#define MOD_SEL1_I2C6_B		((uint32_t)1U << 18U)
+#define MOD_SEL1_I2C7_A		((uint32_t)0U << 17U)
+#define MOD_SEL1_I2C7_B		((uint32_t)1U << 17U)
+#define MOD_SEL1_MSIOF2_A	((uint32_t)0U << 16U)
+#define MOD_SEL1_MSIOF2_B	((uint32_t)1U << 16U)
+#define MOD_SEL1_MSIOF3_A	((uint32_t)0U << 15U)
+#define MOD_SEL1_MSIOF3_B	((uint32_t)1U << 15U)
+#define MOD_SEL1_SCIF3_A	((uint32_t)0U << 13U)
+#define MOD_SEL1_SCIF3_B	((uint32_t)1U << 13U)
+#define MOD_SEL1_SCIF3_C	((uint32_t)2U << 13U)
+#define MOD_SEL1_SCIF4_A	((uint32_t)0U << 11U)
+#define MOD_SEL1_SCIF4_B	((uint32_t)1U << 11U)
+#define MOD_SEL1_SCIF4_C	((uint32_t)2U << 11U)
+#define MOD_SEL1_SCIF5_A	((uint32_t)0U << 9U)
+#define MOD_SEL1_SCIF5_B	((uint32_t)1U << 9U)
+#define MOD_SEL1_SCIF5_C	((uint32_t)2U << 9U)
+#define MOD_SEL1_VIN4_A		((uint32_t)0U << 8U)
+#define MOD_SEL1_VIN4_B		((uint32_t)1U << 8U)
+#define MOD_SEL1_VIN5_A		((uint32_t)0U << 7U)
+#define MOD_SEL1_VIN5_B		((uint32_t)1U << 7U)
+#define MOD_SEL1_ADGC_A		((uint32_t)0U << 5U)
+#define MOD_SEL1_ADGC_B		((uint32_t)1U << 5U)
+#define MOD_SEL1_ADGC_C		((uint32_t)2U << 5U)
+#define MOD_SEL1_SSI9_A		((uint32_t)0U << 4U)
+#define MOD_SEL1_SSI9_B		((uint32_t)1U << 4U)
 
 static void pfc_reg_write(uint32_t addr, uint32_t data);
 
 static void pfc_reg_write(uint32_t addr, uint32_t data)
 {
 	mmio_write_32(PFC_PMMR, ~data);
-	mmio_write_32((uintptr_t) addr, data);
+	mmio_write_32((uintptr_t)addr, data);
 }
 
 void pfc_init_e3(void)