Specify address of UART device to use as a console
This patch adds the ability to specify the base address of a UART
device for initialising the console. This allows a boot loader stage
to use a different UART device from UART0 (default) for the console.
Change-Id: Ie60b927389ae26085cfc90d22a564ff83ba62955
diff --git a/drivers/arm/peripherals/pl011/console.h b/drivers/arm/peripherals/pl011/console.h
index ea45b43..e285909 100644
--- a/drivers/arm/peripherals/pl011/console.h
+++ b/drivers/arm/peripherals/pl011/console.h
@@ -31,7 +31,7 @@
#ifndef __CONSOLE_H__
#define __CONSOLE_H__
-void console_init(void);
+void console_init(unsigned long base_addr);
int console_putc(int c);
int console_getc(void);
diff --git a/drivers/arm/peripherals/pl011/pl011.c b/drivers/arm/peripherals/pl011/pl011.c
index 9d93427..a6a06e6 100644
--- a/drivers/arm/peripherals/pl011/pl011.c
+++ b/drivers/arm/peripherals/pl011/pl011.c
@@ -28,37 +28,43 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include <stdio.h>
#include <console.h>
#include <platform.h>
#include <pl011.h>
+static unsigned long uart_base = PL011_BASE;
+
/*
* TODO: Console init functions shoule be in a console.c. This file should
* only contain the pl011 accessors.
*/
-void console_init(void)
+void console_init(unsigned long base_addr)
{
unsigned int divisor;
+ /* Initialise internal base address variable */
+ uart_base = base_addr;
+
/* Baud Rate */
#if defined(PL011_INTEGER) && defined(PL011_FRACTIONAL)
- mmio_write_32(PL011_BASE + UARTIBRD, PL011_INTEGER);
- mmio_write_32(PL011_BASE + UARTFBRD, PL011_FRACTIONAL);
+ mmio_write_32(uart_base + UARTIBRD, PL011_INTEGER);
+ mmio_write_32(uart_base + UARTFBRD, PL011_FRACTIONAL);
#else
divisor = (PL011_CLK_IN_HZ * 4) / PL011_BAUDRATE;
- mmio_write_32(PL011_BASE + UARTIBRD, divisor >> 6);
- mmio_write_32(PL011_BASE + UARTFBRD, divisor & 0x3F);
+ mmio_write_32(uart_base + UARTIBRD, divisor >> 6);
+ mmio_write_32(uart_base + UARTFBRD, divisor & 0x3F);
#endif
- mmio_write_32(PL011_BASE + UARTLCR_H, PL011_LINE_CONTROL);
+ mmio_write_32(uart_base + UARTLCR_H, PL011_LINE_CONTROL);
/* Clear any pending errors */
- mmio_write_32(PL011_BASE + UARTECR, 0);
+ mmio_write_32(uart_base + UARTECR, 0);
/* Enable tx, rx, and uart overall */
- mmio_write_32(PL011_BASE + UARTCR,
+ mmio_write_32(uart_base + UARTCR,
PL011_UARTCR_RXE | PL011_UARTCR_TXE |
PL011_UARTCR_UARTEN);
}
@@ -68,15 +74,16 @@
if (c == '\n') {
console_putc('\r');
}
- while ((mmio_read_32(PL011_BASE + UARTFR) & PL011_UARTFR_TXFE)
- == 0) ;
- mmio_write_32(PL011_BASE + UARTDR, c);
+
+ while ((mmio_read_32(uart_base + UARTFR) & PL011_UARTFR_TXFE) == 0)
+ ;
+ mmio_write_32(uart_base + UARTDR, c);
return c;
}
int console_getc(void)
{
- while ((mmio_read_32(PL011_BASE + UARTFR) & PL011_UARTFR_RXFE)
- != 0) ;
- return mmio_read_32(PL011_BASE + UARTDR);
+ while ((mmio_read_32(uart_base + UARTFR) & PL011_UARTFR_RXFE) != 0)
+ ;
+ return mmio_read_32(uart_base + UARTDR);
}
diff --git a/plat/fvp/bl1_plat_setup.c b/plat/fvp/bl1_plat_setup.c
index 7a61c66..1cee705 100644
--- a/plat/fvp/bl1_plat_setup.c
+++ b/plat/fvp/bl1_plat_setup.c
@@ -116,7 +116,7 @@
mmio_write_32(SYS_CNTCTL_BASE + CNTCR_OFF, CNTCR_EN);
/* Initialize the console */
- console_init();
+ console_init(PL011_UART0_BASE);
return;
}
diff --git a/plat/fvp/platform.h b/plat/fvp/platform.h
index 6a8c988..375f595 100644
--- a/plat/fvp/platform.h
+++ b/plat/fvp/platform.h
@@ -299,7 +299,11 @@
/*******************************************************************************
* PL011 related constants
******************************************************************************/
-#define PL011_BASE 0x1c090000
+#define PL011_UART0_BASE 0x1c090000
+#define PL011_UART1_BASE 0x1c0a0000
+#define PL011_UART2_BASE 0x1c0b0000
+#define PL011_UART3_BASE 0x1c0c0000
+#define PL011_BASE PL011_UART0_BASE
/*******************************************************************************
* Declarations and constants to access the mailboxes safely. Each mailbox is