fix(cpus): workaround for Cortex-X3 erratum 2372204
Cortex-X3 erratum 2372204 is a Cat B erratum that applies to revisions
r0p0 and r1p0. It is fixed in r1p1.
The workaround is to set bit[40] of CPUACTLR2_EL1 to disable folding
of demand requests into older prefetches with L2 miss requests
outstanding.
SDEN can be found here:
https://developer.arm.com/documentation/SDEN2055130/latest
Change-Id: Iad28f8625c84186fbd8049406d139d4f15c6e069
Signed-off-by: Bipin Ravi <biprav01@u203721.austin.arm.com>
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst
index abd9f87..ccb45a8 100644
--- a/docs/design/cpu-specific-build-macros.rst
+++ b/docs/design/cpu-specific-build-macros.rst
@@ -787,6 +787,10 @@
Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0
of the CPU, it is fixed in r1p1.
+- ``ERRATA_X3_2372204``: This applies errata 2372204 workaround to
+ Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0
+ of the CPU, it is fixed in r1p1.
+
- ``ERRATA_X3_2615812``: This applies errata 2615812 workaround to Cortex-X3
CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the
CPU, it is still open.