tree 225e3f567c89a8565d7c2c2911b971a3749a8174
parent a7c1ea742e2226afe643944e1647b15df1e8f2cc
author Varun Wadekar <vwadekar@nvidia.com> 1455058544 -0800
committer Varun Wadekar <vwadekar@nvidia.com> 1490026456 -0700

Tegra186: fix per-cpu wake times for CPU power states

This patch fixes the logic used to calculate the CPU index for
storing the per-cpu wake times. We use the MIDR register to
calculate the CPU index now. This allows us to store values for
Denver/A57 CPUs properly.

Change-Id: I9df0377afd4b92bbdaea495c0df06a9780a99d09
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>