cpus: denver: fixup register used to store return address
The denver_enable_dco and denver_disable_dco use register X3 to store
the return address. But X3 gets over-written by other functions,
downstream.
This patch stores the return address to X18 instead, to fix this
anomaly.
Change-Id: Ic40bfc1d9abaa7b90348843b9ecd09521bb4ee7b
Signed-off-by: Kalyani Chidambaram <kalyanic@nvidia.com>
diff --git a/lib/cpus/aarch64/denver.S b/lib/cpus/aarch64/denver.S
index c377b28..e260f8d 100644
--- a/lib/cpus/aarch64/denver.S
+++ b/lib/cpus/aarch64/denver.S
@@ -156,12 +156,12 @@
* ----------------------------------------------------
*/
func denver_enable_dco
- mov x3, x30
+ mov x18, x30
bl plat_my_core_pos
mov x1, #1
lsl x1, x1, x0
msr s3_0_c15_c0_2, x1
- mov x30, x3
+ mov x30, x18
ret
endfunc denver_enable_dco
@@ -171,7 +171,7 @@
*/
func denver_disable_dco
- mov x3, x30
+ mov x18, x30
/* turn off background work */
bl plat_my_core_pos
@@ -188,7 +188,7 @@
and x2, x2, x1
cbnz x2, 1b
- mov x30, x3
+ mov x30, x18
ret
endfunc denver_disable_dco