| commit | 89034d61ed78e72582e7e1cd8d0e8409478725bb | [log] [tgz] |
|---|---|---|
| author | Akram Ahmad <Akram.Ahmad@arm.com> | Wed Sep 21 13:59:56 2022 +0100 |
| committer | Bipin Ravi <bipin.ravi@arm.com> | Thu Oct 13 16:19:50 2022 -0500 |
| tree | 765b49d61122512e7048c8de5e8ab5070b88c5a4 | |
| parent | 82801654d713bffa95f3653f26036062e6225985 [diff] [blame] |
fix(cpus): workaround for Cortex-A510 erratum 2666669 Cortex-A510 erratum 2666669 applies to revisions r1p1 and lower, and is fixed in r1p2. The errata is mitigated by setting IMP_CPUACTLR_EL1[38] to 1. SDEN documentation: https://developer.arm.com/documentation/SDEN1873351/latest https://developer.arm.com/documentation/SDEN1873361/latest Signed-off-by: Akram Ahmad <Akram.Ahmad@arm.com> Change-Id: Ief27e4a155e43e75f05f2710d0c7bd5da2dec43f
diff --git a/include/lib/cpus/aarch64/cortex_a510.h b/include/lib/cpus/aarch64/cortex_a510.h index af38734..6af85a8 100644 --- a/include/lib/cpus/aarch64/cortex_a510.h +++ b/include/lib/cpus/aarch64/cortex_a510.h
@@ -36,5 +36,6 @@ ******************************************************************************/ #define CORTEX_A510_CPUACTLR_EL1 S3_0_C15_C1_0 #define CORTEX_A510_CPUACTLR_EL1_BIT_17 (ULL(1) << 17) +#define CORTEX_A510_CPUACTLR_EL1_BIT_38 (ULL(1) << 38) #endif /* CORTEX_A510_H */ \ No newline at end of file