feat(gicv5): add support for building with gicv5
The Generic Interrupt Controller v5 (GICv5) is the next generation of
Arm interrupt controllers. It is a clean slate design and has native
support for the latest Armv9 features. As such it is entirely backwards
incompatible with GICv3/v4.
This patch adds the necessary boilerplate to select a build with GICv5.
The GIC has always had two parts. BL31 deals directly with the CPU
interface while platform code is responsible for managing the IRI. In v5
this split is formalised and the CPU interface, FEAT_GCIE, may be
implemented on its own. So reflect this split in our code with
ENABLE_FEAT_GCIE which only affects BL31 and the GICv5 IRI lies in the
generic GIC driver.
No actual functionality yet.
Change-Id: I97a0c3ba708877c213e50e7ef148e3412aa2af90
Co-developed-by: Achin Gupta <achin.gupta@arm.com>
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
diff --git a/docs/getting_started/build-options.rst b/docs/getting_started/build-options.rst
index c30caac..e80f3d1 100644
--- a/docs/getting_started/build-options.rst
+++ b/docs/getting_started/build-options.rst
@@ -481,6 +481,11 @@
the values 0 to 2, to align with the ``ENABLE_FEAT`` mechanism.
Default value is ``0``.
+ - ``ENABLE_FEAT_GCIE``: Boolean value to enable support for the GICv5 CPU
+ interface (see ``USE_GIC_DRIVER`` for the IRI). GICv5 and GICv3 are mutually
+ exclusive, so the ``ENABLE_FEAT`` mechanism is currently not supported.
+ Default value is ``0``.
+
- ``ENABLE_FEAT_THE``: Numeric value to enable support for FEAT_THE
(Translation Hardening Extension) at EL2 and below, setting the bit
SCR_EL3.RCWMASKEn in EL3 to allow access to RCWMASK_EL1 and RCWSMASK_EL1
@@ -1308,6 +1313,7 @@
- ``3``: use the GICv3 driver. See the next section on how to further configure
it. Use this option for GICv4 implementations.
+ - ``5``: use the EXPERIMENTAL GICv5 driver. Requires ``ENABLE_FEAT_GCIE=1``.
For GIC driver versions other than ``1``, deciding when to save and restore GIC
context on a power domain state transition, as well as any GIC actions outside