tree a31260b8196306ada277ef8bcc5603d38062766e
parent bab2b7f9b8e3b3dbd701417e31349ce4fd77d02a
parent 4201555b2176c923f594ef3631ffa33a7bf12b62
author Manish Pandey <manish.pandey2@arm.com> 1607553884 +0000
committer TrustedFirmware Code Review <review@review.trustedfirmware.org> 1607553884 +0000

Merge changes from topic "versal-bug-fixes-and-new-apis" into integration

* changes:
  plat: xilinx: versal: Add support of register notifier
  plat: xilinx: versal: Add support to get clock rate value
  plat: xilinx: versal: Add support of set max latency for the device
  plat: versal: Add InitFinalize API call
  xilinx: versal: Updated Response of QueryData API call
  plat:xilinx:versal: Use defaults when PDI is without sw partitions
  plat: xilinx: Mask unnecessary bytes of return error code
  xilinx: versal: Skip store/restore of GIC during CPU idle
  plat: versal: Update API list in feature check
  xilinx: versal: Do not pass ACPU0 always in set_wakeup_source()