Merge "Add support to export a /cpus node to the device tree." into integration
diff --git a/docs/components/cot-binding.rst b/docs/components/cot-binding.rst
index 46915db..4f8c8b7 100644
--- a/docs/components/cot-binding.rst
+++ b/docs/components/cot-binding.rst
@@ -279,6 +279,10 @@
                     Description: Contains various non-volatile counters present in the platform.
 
             PROPERTIES
+                - id
+                    Usage: Required for every nv-counter with unique id.
+
+                    Value type: <u32>
 
                 - reg
                     Usage:
@@ -301,21 +305,21 @@
 
 .. code:: c
 
-   non-volatile-counters {
+   non_volatile_counters: non_volatile_counters {
         compatible = "arm, non-volatile-counter";
         #address-cells = <1>;
         #size-cells = <0>;
 
-        counters {
-            trusted-nv-counter: trusted_nv_counter {
-                reg = <TFW_NVCTR_BASE>;
-                oid = TRUSTED_FW_NVCOUNTER_OID;
-            };
-            non_trusted_nv_counter: non_trusted_nv_counter {
-                reg = <NTFW_CTR_BASE>;
-                oid = NON_TRUSTED_FW_NVCOUNTER_OID;
+        trusted-nv-counter: trusted_nv_counter {
+           id  = <TRUSTED_NV_CTR_ID>;
+           reg = <TFW_NVCTR_BASE>;
+           oid = TRUSTED_FW_NVCOUNTER_OID;
+        };
 
-            };
+        non_trusted_nv_counter: non_trusted_nv_counter {
+           id  = <NON_TRUSTED_NV_CTR_ID>;
+           reg = <NTFW_CTR_BASE>;
+           oid = NON_TRUSTED_FW_NVCOUNTER_OID;
         };
    };
 
diff --git a/plat/arm/common/sp_min/arm_sp_min_setup.c b/plat/arm/common/sp_min/arm_sp_min_setup.c
index 6100b78..270093c 100644
--- a/plat/arm/common/sp_min/arm_sp_min_setup.c
+++ b/plat/arm/common/sp_min/arm_sp_min_setup.c
@@ -186,7 +186,7 @@
 	 * Do initial security configuration to allow DRAM/device access
 	 * (if earlier BL has not already done so).
 	 */
-#if RESET_TO_SP_MIN
+#if RESET_TO_SP_MIN && !JUNO_AARCH32_EL3_RUNTIME
 	plat_arm_security_setup();
 
 #if defined(PLAT_ARM_MEM_PROT_ADDR)