diff --git a/plat/imx/imx8ulp/imx8ulp_bl31_setup.c b/plat/imx/imx8ulp/imx8ulp_bl31_setup.c
index c257263..32599f0 100644
--- a/plat/imx/imx8ulp/imx8ulp_bl31_setup.c
+++ b/plat/imx/imx8ulp/imx8ulp_bl31_setup.c
@@ -20,6 +20,7 @@
 #include <platform_def.h>
 
 #include <imx8_lpuart.h>
+#include <imx8ulp_caam.h>
 #include <imx_plat_common.h>
 #include <plat_imx8.h>
 #include <upower_api.h>
@@ -112,6 +113,7 @@
 
 	imx8ulp_init_scmi_server();
 	upower_init();
+	imx8ulp_caam_init();
 }
 
 entry_point_info_t *bl31_plat_get_next_image_ep_info(unsigned int type)
diff --git a/plat/imx/imx8ulp/imx8ulp_caam.c b/plat/imx/imx8ulp/imx8ulp_caam.c
new file mode 100644
index 0000000..d150fe2
--- /dev/null
+++ b/plat/imx/imx8ulp/imx8ulp_caam.c
@@ -0,0 +1,18 @@
+/*
+ * Copyright 2021-2024 NXP.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <lib/mmio.h>
+
+#include <imx8ulp_caam.h>
+
+void imx8ulp_caam_init(void)
+{
+	/* config CAAM JRaMID set MID to Cortex A */
+	mmio_write_32(CAAM_JR0MID, CAAM_NS_MID);
+	mmio_write_32(CAAM_JR1MID, CAAM_NS_MID);
+	mmio_write_32(CAAM_JR2MID, CAAM_NS_MID);
+	mmio_write_32(CAAM_JR3MID, CAAM_NS_MID);
+}
diff --git a/plat/imx/imx8ulp/include/imx8ulp_caam.h b/plat/imx/imx8ulp/include/imx8ulp_caam.h
new file mode 100644
index 0000000..1b93d7d
--- /dev/null
+++ b/plat/imx/imx8ulp/include/imx8ulp_caam.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright 2021-2024 NXP.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef IMX8ULP_CAAM_H
+#define IMX8ULP_CAAM_H
+
+#include <lib/utils_def.h>
+
+#include <platform_def.h>
+
+#define CAAM_JR0MID		(IMX_CAAM_BASE + 0x10)
+#define CAAM_JR1MID		(IMX_CAAM_BASE + 0x18)
+#define CAAM_JR2MID		(IMX_CAAM_BASE + 0x20)
+#define CAAM_JR3MID		(IMX_CAAM_BASE + 0x28)
+#define CAAM_NS_MID		(0x7)
+
+#define JR0_BASE		(IMX_CAAM_BASE + 0x1000)
+
+void imx8ulp_caam_init(void);
+
+#endif /* IMX8ULP_CAAM_H */
diff --git a/plat/imx/imx8ulp/include/platform_def.h b/plat/imx/imx8ulp/include/platform_def.h
index fc4bdaf..aa77dcb 100644
--- a/plat/imx/imx8ulp/include/platform_def.h
+++ b/plat/imx/imx8ulp/include/platform_def.h
@@ -52,6 +52,7 @@
 #define IMX_LPUART4_BASE		U(0x29390000)
 #define IMX_LPUART5_BASE		U(0x293a0000)
 #define IMX_LPUART_BASE			IMX_LPUART5_BASE
+#define IMX_CAAM_BASE			U(0x292e0000)
 #define IMX_BOOT_UART_CLK_IN_HZ		24000000
 #define IMX_CONSOLE_BAUDRATE		115200
 
diff --git a/plat/imx/imx8ulp/platform.mk b/plat/imx/imx8ulp/platform.mk
index 49a053e..e075bf4 100644
--- a/plat/imx/imx8ulp/platform.mk
+++ b/plat/imx/imx8ulp/platform.mk
@@ -31,6 +31,7 @@
 				lib/cpus/aarch64/cortex_a35.S		\
 				drivers/delay_timer/delay_timer.c	\
 				drivers/delay_timer/generic_delay_timer.c \
+				plat/imx/imx8ulp/imx8ulp_caam.c         \
 				drivers/scmi-msg/base.c			\
 				drivers/scmi-msg/entry.c		\
 				drivers/scmi-msg/smt.c			\