Merge "feat(ethos-n): update npu error handling" into integration
diff --git a/drivers/arm/ethosn/ethosn_big_fw.c b/drivers/arm/ethosn/ethosn_big_fw.c
index ea48a24..2aad5da 100644
--- a/drivers/arm/ethosn/ethosn_big_fw.c
+++ b/drivers/arm/ethosn/ethosn_big_fw.c
@@ -12,7 +12,7 @@
#define ETHOSN_BIG_FW_MAGIC ('E' | ('N' << 8) | ('F' << 16) | ('W' << 24))
/* Supported big firmware version */
-#define ETHOSN_BIG_FW_VERSION_MAJOR 12
+#define ETHOSN_BIG_FW_VERSION_MAJOR 15
#define ETHOSN_ARCH_VER_MAJOR_MASK U(0xF000)
#define ETHOSN_ARCH_VER_MAJOR_SHIFT U(0xC)
diff --git a/drivers/arm/ethosn/ethosn_smc.c b/drivers/arm/ethosn/ethosn_smc.c
index 42158e4..9aa7e23 100644
--- a/drivers/arm/ethosn/ethosn_smc.c
+++ b/drivers/arm/ethosn/ethosn_smc.c
@@ -46,7 +46,7 @@
#define ETHOSN_AUX_FEAT_STASHING U(0x2)
#define SEC_AUXCTLR_REG U(0x0024)
-#define SEC_AUXCTLR_VAL U(0x80)
+#define SEC_AUXCTLR_VAL U(0x000ce080)
#define SEC_AUXCTLR_LEVEL_IRQ_VAL U(0x04)
#define SEC_AUXCTLR_STASHING_VAL U(0xA5000000)
@@ -73,7 +73,7 @@
#define SEC_SYSCTRL0_HARD_RESET U(1U << 31)
#define SEC_SYSCTRL1_REG U(0x001C)
-#define SEC_SYSCTRL1_VAL U(0x180110)
+#define SEC_SYSCTRL1_VAL U(0xe0180110)
#define SEC_NSAID_REG_BASE U(0x3004)
#define SEC_NSAID_OFFSET U(0x1000)
diff --git a/include/drivers/arm/ethosn.h b/include/drivers/arm/ethosn.h
index 993dd12..51ce65d 100644
--- a/include/drivers/arm/ethosn.h
+++ b/include/drivers/arm/ethosn.h
@@ -47,7 +47,7 @@
#define is_ethosn_fid(_fid) (((_fid) & ETHOSN_FID_MASK) == ETHOSN_FID_VALUE)
/* Service version */
-#define ETHOSN_VERSION_MAJOR U(3)
+#define ETHOSN_VERSION_MAJOR U(4)
#define ETHOSN_VERSION_MINOR U(0)
/* Return codes for function calls */