diff --git a/plat/intel/soc/agilex/include/agilex_memory_controller.h b/plat/intel/soc/agilex/include/agilex_memory_controller.h
index c0c94e6..419bd2e 100644
--- a/plat/intel/soc/agilex/include/agilex_memory_controller.h
+++ b/plat/intel/soc/agilex/include/agilex_memory_controller.h
@@ -10,6 +10,8 @@
 #define AGX_MPFE_IOHMC_REG_DRAMADDRW			0xf80100a8
 #define AGX_MPFE_IOHMC_CTRLCFG0				0xf8010028
 #define AGX_MPFE_IOHMC_CTRLCFG1				0xf801002c
+#define AGX_MPFE_IOHMC_CTRLCFG2				0xf8010030
+#define AGX_MPFE_IOHMC_CTRLCFG3				0xf8010034
 #define AGX_MPFE_IOHMC_DRAMADDRW			0xf80100a8
 #define AGX_MPFE_IOHMC_DRAMTIMING0			0xf8010050
 #define AGX_MPFE_IOHMC_CALTIMING0			0xf801007c
@@ -127,6 +129,7 @@
 #define AGX_NOC_FW_DDR_SCR_NONMPUREGION0ADDR_LIMIT	0xf8020298
 
 #define AGX_SOC_NOC_FW_DDR_SCR_ENABLE			0xf8020200
+#define AGX_SOC_NOC_FW_DDR_SCR_ENABLESET		0xf8020204
 #define AGX_CCU_NOC_DI_SET_MSK				0x10
 
 #define AGX_SYSMGR_CORE_HMC_CLK				0xffd120b4
@@ -156,6 +159,7 @@
 #define IOHMC_DRAMADDRW_CFG_ROW_ADDR_WIDTH(x)		(((x) & 0x003e0) >> 5)
 
 #define AGX_SDRAM_0_LB_ADDR				0x0
+#define AGX_DDR_SIZE					0x40000000
 
 int init_hard_memory_controller(void);