Merge pull request #1822 from antonio-nino-diaz-arm/an/plat-arm
docs: Update note about plat/arm in Porting Guide
diff --git a/drivers/imx/uart/imx_uart.c b/drivers/imx/uart/imx_uart.c
index 68d31c8..2c9652d 100644
--- a/drivers/imx/uart/imx_uart.c
+++ b/drivers/imx/uart/imx_uart.c
@@ -62,8 +62,8 @@
return mmio_read_32(base + offset);
}
-int console_core_init(uintptr_t base_addr, unsigned int uart_clk,
- unsigned int baud_rate)
+int console_imx_uart_core_init(uintptr_t base_addr, unsigned int uart_clk,
+ unsigned int baud_rate)
{
uint32_t val;
uint8_t clk_idx = 1;
@@ -129,12 +129,12 @@
* Clobber list : r2
* --------------------------------------------------------
*/
-int console_core_putc(int c, uintptr_t base_addr)
+int console_imx_uart_core_putc(int c, uintptr_t base_addr)
{
uint32_t val;
if (c == '\n')
- console_core_putc('\r', base_addr);
+ console_imx_uart_core_putc('\r', base_addr);
/* Write data */
write_reg(base_addr, IMX_UART_TXD_OFFSET, c);
@@ -155,7 +155,7 @@
* Clobber list : r0, r1
* ---------------------------------------------
*/
-int console_core_getc(uintptr_t base_addr)
+int console_imx_uart_core_getc(uintptr_t base_addr)
{
uint32_t val;
@@ -175,7 +175,7 @@
* Clobber list : r0, r1
* ---------------------------------------------
*/
-int console_core_flush(uintptr_t base_addr)
+int console_imx_uart_core_flush(uintptr_t base_addr)
{
return 0;
}
diff --git a/drivers/imx/uart/imx_uart.h b/drivers/imx/uart/imx_uart.h
index c3edbc7..b71504c 100644
--- a/drivers/imx/uart/imx_uart.h
+++ b/drivers/imx/uart/imx_uart.h
@@ -6,6 +6,8 @@
#ifndef IMX_UART_H
#define IMX_UART_H
+#include <drivers/console.h>
+
#define IMX_UART_RXD_OFFSET 0x00
#define IMX_UART_RXD_CHARRDY BIT(15)
#define IMX_UART_RXD_ERR BIT(14)
@@ -150,4 +152,17 @@
#define IMX_UART_TS_RXFULL BIT(3)
#define IMX_UART_TS_SOFTRST BIT(0)
+#ifndef __ASSEMBLY__
+
+typedef struct {
+ console_t console;
+ uintptr_t base;
+} console_imx_uart_t;
+
+int console_imx_uart_register(uintptr_t baseaddr,
+ uint32_t clock,
+ uint32_t baud,
+ console_imx_uart_t *console);
+#endif /*__ASSEMBLY__*/
+
#endif /* IMX_UART_H */
diff --git a/drivers/partition/partition.c b/drivers/partition/partition.c
index 6fa3df0..7fdbf53 100644
--- a/drivers/partition/partition.c
+++ b/drivers/partition/partition.c
@@ -105,6 +105,57 @@
return 0;
}
+static int load_mbr_entry(uintptr_t image_handle, mbr_entry_t *mbr_entry,
+ int part_number)
+{
+ size_t bytes_read;
+ uintptr_t offset;
+ int result;
+
+ assert(mbr_entry != NULL);
+ /* MBR partition table is in LBA0. */
+ result = io_seek(image_handle, IO_SEEK_SET, MBR_OFFSET);
+ if (result != 0) {
+ WARN("Failed to seek (%i)\n", result);
+ return result;
+ }
+ result = io_read(image_handle, (uintptr_t)&mbr_sector,
+ PARTITION_BLOCK_SIZE, &bytes_read);
+ if (result != 0) {
+ WARN("Failed to read data (%i)\n", result);
+ return result;
+ }
+
+ /* Check MBR boot signature. */
+ if ((mbr_sector[PARTITION_BLOCK_SIZE - 2] != MBR_SIGNATURE_FIRST) ||
+ (mbr_sector[PARTITION_BLOCK_SIZE - 1] != MBR_SIGNATURE_SECOND)) {
+ return -ENOENT;
+ }
+ offset = (uintptr_t)&mbr_sector +
+ MBR_PRIMARY_ENTRY_OFFSET +
+ MBR_PRIMARY_ENTRY_SIZE * part_number;
+ memcpy(mbr_entry, (void *)offset, sizeof(mbr_entry_t));
+
+ return 0;
+}
+
+static int load_mbr_entries(uintptr_t image_handle)
+{
+ mbr_entry_t mbr_entry;
+ int i;
+
+ list.entry_count = MBR_PRIMARY_ENTRY_NUMBER;
+
+ for (i = 0; i < list.entry_count; i++) {
+ load_mbr_entry(image_handle, &mbr_entry, i);
+ list.list[i].start = mbr_entry.first_lba * 512;
+ list.list[i].length = mbr_entry.sector_nums * 512;
+ list.list[i].name[0] = mbr_entry.type;
+ }
+
+ return 0;
+}
+
static int load_gpt_entry(uintptr_t image_handle, gpt_entry_t *entry)
{
size_t bytes_read;
@@ -175,11 +226,9 @@
assert(result == 0);
result = verify_partition_gpt(image_handle);
} else {
- /* MBR type isn't supported yet. */
- result = -EINVAL;
- goto exit;
+ result = load_mbr_entries(image_handle);
}
-exit:
+
io_close(image_handle);
return result;
}
diff --git a/plat/hisilicon/hikey960/hikey960_bl31_setup.c b/plat/hisilicon/hikey960/hikey960_bl31_setup.c
index 5d70dbf..9383265 100644
--- a/plat/hisilicon/hikey960/hikey960_bl31_setup.c
+++ b/plat/hisilicon/hikey960/hikey960_bl31_setup.c
@@ -141,6 +141,21 @@
}
}
+static void hikey960_iomcu_dma_init(void)
+{
+ int i;
+ uint32_t non_secure;
+
+ non_secure = IOMCU_DMAC_SEC_CTRL_INTR_SEC | IOMCU_DMAC_SEC_CTRL_GLOBAL_SEC;
+ mmio_write_32(IOMCU_DMAC_SEC_CTRL, non_secure);
+
+ /* channels 0-3 are reserved */
+ for (i = 4; i < IOMCU_DMAC_CHANNEL_NUMS; i++) {
+ mmio_write_32(IOMCU_DMAC_AXI_CONF(i), IOMCU_DMAC_AXI_CONF_ARPROT_NS |
+ IOMCU_DMAC_AXI_CONF_AWPROT_NS);
+ }
+}
+
void bl31_platform_setup(void)
{
/* Initialize the GIC driver, cpu and distributor interfaces */
@@ -150,6 +165,7 @@
gicv2_cpuif_enable();
hikey960_edma_init();
+ hikey960_iomcu_dma_init();
hisi_ipc_init();
}
diff --git a/plat/hisilicon/hikey960/include/hi3660.h b/plat/hisilicon/hikey960/include/hi3660.h
index c9ecd32..5b9305a 100644
--- a/plat/hisilicon/hikey960/include/hi3660.h
+++ b/plat/hisilicon/hikey960/include/hi3660.h
@@ -373,4 +373,13 @@
#define EDMAC_SEC_CTRL_GLOBAL_SEC (1 << 0)
#define EDMAC_CHANNEL_NUMS 16
+#define IOMCU_DMAC_BASE 0xffd77000
+#define IOMCU_DMAC_SEC_CTRL (IOMCU_DMAC_BASE + 0x694)
+#define IOMCU_DMAC_AXI_CONF(x) (IOMCU_DMAC_BASE + 0x820 + ((x) << 6))
+#define IOMCU_DMAC_AXI_CONF_ARPROT_NS (1 << 6)
+#define IOMCU_DMAC_AXI_CONF_AWPROT_NS (1 << 18)
+#define IOMCU_DMAC_SEC_CTRL_INTR_SEC (1 << 1)
+#define IOMCU_DMAC_SEC_CTRL_GLOBAL_SEC (1 << 0)
+#define IOMCU_DMAC_CHANNEL_NUMS 8
+
#endif /* HI3660_H */
diff --git a/plat/imx/common/aarch32/imx_uart_console.S b/plat/imx/common/aarch32/imx_uart_console.S
new file mode 100644
index 0000000..e526d9c
--- /dev/null
+++ b/plat/imx/common/aarch32/imx_uart_console.S
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#include <arch.h>
+#include <asm_macros.S>
+#define USE_FINISH_CONSOLE_REG_2
+#include <console_macros.S>
+#include <assert_macros.S>
+#include "imx_uart.h"
+
+ .globl console_imx_uart_register
+ .globl console_imx_uart_putc
+ .globl console_imx_uart_getc
+ .globl console_imx_uart_flush
+
+func console_imx_uart_register
+ push {r4, lr}
+ mov r4, r3
+ cmp r4, #0
+ beq register_fail
+ str r0, [r4, #CONSOLE_T_DRVDATA]
+
+ bl console_imx_uart_core_init
+ cmp r0, #0
+ bne register_fail
+
+ mov r0, r4
+ pop {r4, lr}
+ finish_console_register imx_uart putc=1, getc=1, flush=1
+
+register_fail:
+ pop {r4, pc}
+endfunc console_imx_uart_register
+
+func console_imx_uart_putc
+ ldr r1, [r1, #CONSOLE_T_DRVDATA]
+ b console_imx_uart_core_putc
+endfunc console_imx_uart_putc
+
+func console_imx_uart_getc
+ ldr r0, [r0, #CONSOLE_T_DRVDATA]
+ b console_imx_uart_core_getc
+endfunc console_imx_uart_getc
+
+func console_imx_uart_flush
+ ldr r0, [r0, #CONSOLE_T_DRVDATA]
+ b console_imx_uart_core_flush
+endfunc console_imx_uart_flush
diff --git a/plat/imx/imx7/warp7/platform.mk b/plat/imx/imx7/warp7/platform.mk
index f29f779..6cd7566 100644
--- a/plat/imx/imx7/warp7/platform.mk
+++ b/plat/imx/imx7/warp7/platform.mk
@@ -59,6 +59,7 @@
plat/imx/imx7/warp7/warp7_bl2_mem_params_desc.c \
plat/imx/imx7/warp7/warp7_io_storage.c \
plat/imx/imx7/warp7/warp7_image_load.c \
+ plat/imx/common/aarch32/imx_uart_console.S \
${XLAT_TABLES_LIB_SRCS}
ifneq (${TRUSTED_BOARD_BOOT},0)
@@ -118,6 +119,9 @@
# Use Coherent memory
USE_COHERENT_MEM := 1
+# Use multi console API
+MULTI_CONSOLE_API := 1
+
# PLAT_WARP7_UART
PLAT_WARP7_UART :=1
$(eval $(call add_define,PLAT_WARP7_UART))
diff --git a/plat/imx/imx7/warp7/warp7_bl2_el3_setup.c b/plat/imx/imx7/warp7/warp7_bl2_el3_setup.c
index 08baf19..0eedd21 100644
--- a/plat/imx/imx7/warp7/warp7_bl2_el3_setup.c
+++ b/plat/imx/imx7/warp7/warp7_bl2_el3_setup.c
@@ -258,6 +258,8 @@
uint32_t uart1_en_bits = (uint32_t)UART1_CLK_SELECT;
uint32_t uart6_en_bits = (uint32_t)UART6_CLK_SELECT;
uint32_t usdhc_clock_sel = PLAT_WARP7_SD - 1;
+ static console_imx_uart_t console;
+ int console_scope = CONSOLE_FLAG_BOOT | CONSOLE_FLAG_RUNTIME;
/* Initialize the AIPS */
imx_aips_init();
@@ -278,8 +280,12 @@
warp7_setup_pinmux();
/* Init UART, storage and friends */
- console_init(PLAT_WARP7_BOOT_UART_BASE, PLAT_WARP7_BOOT_UART_CLK_IN_HZ,
- PLAT_WARP7_CONSOLE_BAUDRATE);
+ console_imx_uart_register(PLAT_WARP7_BOOT_UART_BASE,
+ PLAT_WARP7_BOOT_UART_CLK_IN_HZ,
+ PLAT_WARP7_CONSOLE_BAUDRATE,
+ &console);
+ console_set_scope(&console.console, console_scope);
+
warp7_usdhc_setup();
/* Open handles to persistent storage */
diff --git a/plat/intel/soc/stratix10/bl2_plat_setup.c b/plat/intel/soc/stratix10/bl2_plat_setup.c
index 2b40eef..91e3b0a 100644
--- a/plat/intel/soc/stratix10/bl2_plat_setup.c
+++ b/plat/intel/soc/stratix10/bl2_plat_setup.c
@@ -96,9 +96,6 @@
enable_mmu_el3(0);
- /* ECC Scrubbing */
- memset(0, DRAM_BASE, DRAM_SIZE);
-
dw_mmc_params_t params = EMMC_INIT_PARAMS(0x100000);
info.mmc_dev_type = MMC_IS_SD;
diff --git a/plat/intel/soc/stratix10/include/s10_memory_controller.h b/plat/intel/soc/stratix10/include/s10_memory_controller.h
index f2a3e19..ad7cb9d 100644
--- a/plat/intel/soc/stratix10/include/s10_memory_controller.h
+++ b/plat/intel/soc/stratix10/include/s10_memory_controller.h
@@ -57,8 +57,11 @@
#define S10_MPFE_DDR_MAIN_SCHED_ACTIVATE_RRD_OFST 0
#define S10_MPFE_DDR_MAIN_SCHED_DDRCONF_SET(x) (((x) << 0) & 0x0000001f)
#define S10_MPFE_DDR_MAIN_SCHED_DEVTODEV_BUSRDTORD_OFST 0
+#define S10_MPFE_DDR_MAIN_SCHED_DEVTODEV_BUSRDTORD_MSK (BIT(0) | BIT(1))
#define S10_MPFE_DDR_MAIN_SCHED_DEVTODEV_BUSRDTOWR_OFST 2
+#define S10_MPFE_DDR_MAIN_SCHED_DEVTODEV_BUSRDTOWR_MSK (BIT(2) | BIT(3))
#define S10_MPFE_DDR_MAIN_SCHED_DEVTODEV_BUSWRTORD_OFST 4
+#define S10_MPFE_DDR_MAIN_SCHED_DEVTODEV_BUSWRTORD_MSK (BIT(4) | BIT(5))
#define S10_MPFE_HMC_ADP(x) (0xf8011000 + (x))
#define S10_MPFE_HMC_ADP_HPSINTFCSEL 0xf8011210
diff --git a/plat/intel/soc/stratix10/soc/s10_memory_controller.c b/plat/intel/soc/stratix10/soc/s10_memory_controller.c
index c528176..851fc59 100644
--- a/plat/intel/soc/stratix10/soc/s10_memory_controller.c
+++ b/plat/intel/soc/stratix10/soc/s10_memory_controller.c
@@ -10,6 +10,7 @@
#include <lib/mmio.h>
#include <common/debug.h>
#include <drivers/delay_timer.h>
+#include <platform_def.h>
#include <string.h>
#include "s10_memory_controller.h"
@@ -316,9 +317,15 @@
act_to_act_bank << S10_MPFE_DDR_MAIN_SCHED_ACTIVATE_RRD_OFST);
mmio_write_32(S10_MPFE_DDR_MAIN_SCHED_DEVTODEV,
- bus_rd_to_rd << S10_MPFE_DDR_MAIN_SCHED_DEVTODEV_BUSRDTORD_OFST |
- bus_rd_to_wr << S10_MPFE_DDR_MAIN_SCHED_DEVTODEV_BUSRDTOWR_OFST |
- bus_wr_to_rd << S10_MPFE_DDR_MAIN_SCHED_DEVTODEV_BUSWRTORD_OFST);
+ ((bus_rd_to_rd
+ << S10_MPFE_DDR_MAIN_SCHED_DEVTODEV_BUSRDTORD_OFST)
+ & S10_MPFE_DDR_MAIN_SCHED_DEVTODEV_BUSRDTORD_MSK) |
+ ((bus_rd_to_wr
+ << S10_MPFE_DDR_MAIN_SCHED_DEVTODEV_BUSRDTOWR_OFST)
+ & S10_MPFE_DDR_MAIN_SCHED_DEVTODEV_BUSRDTOWR_MSK) |
+ ((bus_wr_to_rd
+ << S10_MPFE_DDR_MAIN_SCHED_DEVTODEV_BUSWRTORD_OFST)
+ & S10_MPFE_DDR_MAIN_SCHED_DEVTODEV_BUSWRTORD_MSK));
}
@@ -393,7 +400,10 @@
S10_MPFE_HMC_ADP_ECCCTRL1_CNT_RST_SET_MSK |
S10_MPFE_HMC_ADP_ECCCTRL1_ECC_EN_SET_MSK,
S10_MPFE_HMC_ADP_ECCCTRL1_ECC_EN_SET_MSK);
+ INFO("Scrubbing ECC\n");
+ /* ECC Scrubbing */
+ memset(DRAM_BASE, 0, DRAM_SIZE);
} else {
INFO("ECC is disabled.\n");
}
diff --git a/plat/ti/k3/common/drivers/ti_sci/ti_sci.c b/plat/ti/k3/common/drivers/ti_sci/ti_sci.c
index 4a33d34..df0b794 100644
--- a/plat/ti/k3/common/drivers/ti_sci/ti_sci.c
+++ b/plat/ti/k3/common/drivers/ti_sci/ti_sci.c
@@ -95,7 +95,7 @@
hdr->seq = info.seq;
hdr->type = msg_type;
hdr->host = info.desc.host_id;
- hdr->flags = msg_flags;
+ hdr->flags = msg_flags | TI_SCI_FLAG_REQ_ACK_ON_PROCESSED;
xfer->tx_message.buf = tx_buf;
xfer->tx_message.len = tx_message_size;
@@ -143,6 +143,9 @@
return -EINVAL;
}
+ if (!(hdr->flags & TI_SCI_FLAG_RESP_GENERIC_ACK))
+ return -ENODEV;
+
return 0;
}
@@ -214,20 +217,6 @@
}
/**
- * ti_sci_is_response_ack() - Generic ACK/NACK message check
- *
- * @r: pointer to response buffer
- *
- * Return: true if the response was an ACK, else returns false
- */
-static inline bool ti_sci_is_response_ack(void *r)
-{
- struct ti_sci_msg_hdr *hdr = r;
-
- return hdr->flags & TI_SCI_FLAG_RESP_GENERIC_ACK ? true : false;
-}
-
-/**
* ti_sci_device_set_state() - Set device state
*
* @id: Device identifier
@@ -236,7 +225,7 @@
*
* Return: 0 if all goes well, else appropriate error message
*/
-int ti_sci_device_set_state(uint32_t id, uint32_t flags, uint8_t state)
+static int ti_sci_device_set_state(uint32_t id, uint32_t flags, uint8_t state)
{
struct ti_sci_msg_req_set_device_state req;
struct ti_sci_msg_hdr resp;
@@ -244,8 +233,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TI_SCI_MSG_SET_DEVICE_STATE,
- flags | TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TI_SCI_MSG_SET_DEVICE_STATE, flags,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -263,9 +251,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
return 0;
}
@@ -280,8 +265,9 @@
*
* Return: 0 if all goes well, else appropriate error message
*/
-int ti_sci_device_get_state(uint32_t id, uint32_t *clcnt, uint32_t *resets,
- uint8_t *p_state, uint8_t *c_state)
+static int ti_sci_device_get_state(uint32_t id, uint32_t *clcnt,
+ uint32_t *resets, uint8_t *p_state,
+ uint8_t *c_state)
{
struct ti_sci_msg_req_get_device_state req;
struct ti_sci_msg_resp_get_device_state resp;
@@ -309,9 +295,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
if (clcnt)
*clcnt = resp.context_loss_count;
if (resets)
@@ -333,12 +316,31 @@
* usage count by balancing get_device with put_device. No refcounting is
* managed by driver for that purpose.
*
- * NOTE: The request is for exclusive access for the processor.
- *
* Return: 0 if all goes well, else appropriate error message
*/
int ti_sci_device_get(uint32_t id)
{
+ return ti_sci_device_set_state(id, 0, MSG_DEVICE_SW_STATE_ON);
+}
+
+/**
+ * ti_sci_device_get_exclusive() - Exclusive request for device managed by TISCI
+ *
+ * @id: Device Identifier
+ *
+ * Request for the device - NOTE: the client MUST maintain integrity of
+ * usage count by balancing get_device with put_device. No refcounting is
+ * managed by driver for that purpose.
+ *
+ * NOTE: This _exclusive version of the get API is for exclusive access to the
+ * device. Any other host in the system will fail to get this device after this
+ * call until exclusive access is released with device_put or a non-exclusive
+ * set call.
+ *
+ * Return: 0 if all goes well, else appropriate error message
+ */
+int ti_sci_device_get_exclusive(uint32_t id)
+{
return ti_sci_device_set_state(id,
MSG_FLAG_DEVICE_EXCLUSIVE,
MSG_DEVICE_SW_STATE_ON);
@@ -357,6 +359,27 @@
*/
int ti_sci_device_idle(uint32_t id)
{
+ return ti_sci_device_set_state(id, 0, MSG_DEVICE_SW_STATE_RETENTION);
+}
+
+/**
+ * ti_sci_device_idle_exclusive() - Exclusive idle a device managed by TISCI
+ *
+ * @id: Device Identifier
+ *
+ * Request for the device - NOTE: the client MUST maintain integrity of
+ * usage count by balancing get_device with put_device. No refcounting is
+ * managed by driver for that purpose.
+ *
+ * NOTE: This _exclusive version of the idle API is for exclusive access to
+ * the device. Any other host in the system will fail to get this device after
+ * this call until exclusive access is released with device_put or a
+ * non-exclusive set call.
+ *
+ * Return: 0 if all goes well, else appropriate error message
+ */
+int ti_sci_device_idle_exclusive(uint32_t id)
+{
return ti_sci_device_set_state(id,
MSG_FLAG_DEVICE_EXCLUSIVE,
MSG_DEVICE_SW_STATE_RETENTION);
@@ -379,6 +402,53 @@
}
/**
+ * ti_sci_device_put_no_wait() - Release a device without requesting or waiting
+ * for a response.
+ *
+ * @id: Device Identifier
+ *
+ * Request for the device - NOTE: the client MUST maintain integrity of
+ * usage count by balancing get_device with put_device. No refcounting is
+ * managed by driver for that purpose.
+ *
+ * Return: 0 if all goes well, else appropriate error message
+ */
+int ti_sci_device_put_no_wait(uint32_t id)
+{
+ struct ti_sci_msg_req_set_device_state req;
+ struct ti_sci_msg_hdr *hdr;
+ struct k3_sec_proxy_msg tx_message;
+ int ret;
+
+ /* Ensure we have sane transfer size */
+ if (sizeof(req) > info.desc.max_msg_size)
+ return -ERANGE;
+
+ hdr = (struct ti_sci_msg_hdr *)&req;
+ hdr->seq = info.seq;
+ hdr->type = TI_SCI_MSG_SET_DEVICE_STATE;
+ hdr->host = info.desc.host_id;
+ /* Setup with NORESPONSE flag to keep response queue clean */
+ hdr->flags = TI_SCI_FLAG_REQ_GENERIC_NORESPONSE;
+
+ req.id = id;
+ req.state = MSG_DEVICE_SW_STATE_AUTO_OFF;
+
+ tx_message.buf = (uint8_t *)&req;
+ tx_message.len = sizeof(req);
+
+ /* Send message */
+ ret = k3_sec_proxy_send(SP_HIGH_PRIORITY, &tx_message);
+ if (ret) {
+ ERROR("Message sending failed (%d)\n", ret);
+ return ret;
+ }
+
+ /* Return without waiting for response */
+ return 0;
+}
+
+/**
* ti_sci_device_is_valid() - Is the device valid
*
* @id: Device Identifier
@@ -532,8 +602,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TI_SCI_MSG_SET_DEVICE_RESETS,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TI_SCI_MSG_SET_DEVICE_RESETS, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -551,9 +620,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
return 0;
}
@@ -591,8 +657,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TI_SCI_MSG_SET_CLOCK_STATE,
- flags | TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TI_SCI_MSG_SET_CLOCK_STATE, flags,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -611,9 +676,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
return 0;
}
@@ -642,8 +704,7 @@
if (!programmed_state && !current_state)
return -EINVAL;
- ret = ti_sci_setup_one_xfer(TI_SCI_MSG_GET_CLOCK_STATE,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TI_SCI_MSG_GET_CLOCK_STATE, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -661,9 +722,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
if (programmed_state)
*programmed_state = resp.programmed_state;
if (current_state)
@@ -848,8 +906,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TI_SCI_MSG_SET_CLOCK_PARENT,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TI_SCI_MSG_SET_CLOCK_PARENT, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -868,9 +925,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
return 0;
}
@@ -893,8 +947,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TI_SCI_MSG_GET_CLOCK_PARENT,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TI_SCI_MSG_GET_CLOCK_PARENT, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -912,9 +965,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
*parent_id = resp.parent_id;
return 0;
@@ -940,8 +990,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TI_SCI_MSG_GET_NUM_CLOCK_PARENTS,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TI_SCI_MSG_GET_NUM_CLOCK_PARENTS, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -959,9 +1008,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
*num_parents = resp.num_parents;
return 0;
@@ -996,8 +1042,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TI_SCI_MSG_QUERY_CLOCK_FREQ,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TI_SCI_MSG_QUERY_CLOCK_FREQ, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -1018,9 +1063,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
*match_freq = resp.freq_hz;
return 0;
@@ -1053,8 +1095,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TI_SCI_MSG_SET_CLOCK_FREQ,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TI_SCI_MSG_SET_CLOCK_FREQ, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -1074,9 +1115,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
return 0;
}
@@ -1099,8 +1137,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TI_SCI_MSG_GET_CLOCK_FREQ,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TI_SCI_MSG_GET_CLOCK_FREQ, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -1118,9 +1155,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
*freq = resp.freq_hz;
return 0;
@@ -1139,8 +1173,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TI_SCI_MSG_SYS_RESET,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TI_SCI_MSG_SYS_RESET, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -1155,9 +1188,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
return 0;
}
@@ -1176,8 +1206,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TISCI_MSG_PROC_REQUEST,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TISCI_MSG_PROC_REQUEST, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -1194,9 +1223,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
return 0;
}
@@ -1215,8 +1241,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TISCI_MSG_PROC_RELEASE,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TISCI_MSG_PROC_RELEASE, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -1233,9 +1258,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
return 0;
}
@@ -1256,8 +1278,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TISCI_MSG_PROC_HANDOVER,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TISCI_MSG_PROC_HANDOVER, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -1275,9 +1296,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
return 0;
}
@@ -1300,8 +1318,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TISCI_MSG_SET_PROC_BOOT_CONFIG,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TISCI_MSG_SET_PROC_BOOT_CONFIG, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -1323,9 +1340,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
return 0;
}
@@ -1347,8 +1361,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TISCI_MSG_SET_PROC_BOOT_CTRL,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TISCI_MSG_SET_PROC_BOOT_CTRL, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -1367,9 +1380,55 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
+ return 0;
+}
+
+/**
+ * ti_sci_proc_set_boot_ctrl_no_wait() - Set the processor boot control flags
+ * without requesting or waiting for a
+ * response.
+ *
+ * @proc_id: Processor ID this request is for
+ * @control_flags_set: Control flags to be set
+ * @control_flags_clear: Control flags to be cleared
+ *
+ * Return: 0 if all goes well, else appropriate error message
+ */
+int ti_sci_proc_set_boot_ctrl_no_wait(uint8_t proc_id,
+ uint32_t control_flags_set,
+ uint32_t control_flags_clear)
+{
+ struct ti_sci_msg_req_set_proc_boot_ctrl req;
+ struct ti_sci_msg_hdr *hdr;
+ struct k3_sec_proxy_msg tx_message;
+ int ret;
+
+ /* Ensure we have sane transfer size */
+ if (sizeof(req) > info.desc.max_msg_size)
+ return -ERANGE;
+
+ hdr = (struct ti_sci_msg_hdr *)&req;
+ hdr->seq = info.seq;
+ hdr->type = TISCI_MSG_SET_PROC_BOOT_CTRL;
+ hdr->host = info.desc.host_id;
+ /* Setup with NORESPONSE flag to keep response queue clean */
+ hdr->flags = TI_SCI_FLAG_REQ_GENERIC_NORESPONSE;
+
+ req.processor_id = proc_id;
+ req.control_flags_set = control_flags_set;
+ req.control_flags_clear = control_flags_clear;
+
+ tx_message.buf = (uint8_t *)&req;
+ tx_message.len = sizeof(req);
+ /* Send message */
+ ret = k3_sec_proxy_send(SP_HIGH_PRIORITY, &tx_message);
+ if (ret) {
+ ERROR("Message sending failed (%d)\n", ret);
+ return ret;
+ }
+
+ /* Return without waiting for response */
return 0;
}
@@ -1390,8 +1449,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TISCI_MSG_PROC_AUTH_BOOT_IMIAGE,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TISCI_MSG_PROC_AUTH_BOOT_IMIAGE, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -1411,9 +1469,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
return 0;
}
@@ -1435,8 +1490,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TISCI_MSG_GET_PROC_BOOT_STATUS,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TISCI_MSG_GET_PROC_BOOT_STATUS, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -1453,9 +1507,6 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
*bv = (resp.bootvector_low & TISCI_ADDR_LOW_MASK) |
(((uint64_t)resp.bootvector_high << TISCI_ADDR_HIGH_SHIFT) &
TISCI_ADDR_HIGH_MASK);
@@ -1515,8 +1566,7 @@
struct ti_sci_xfer xfer;
int ret;
- ret = ti_sci_setup_one_xfer(TISCI_MSG_WAIT_PROC_BOOT_STATUS,
- TI_SCI_FLAG_REQ_ACK_ON_PROCESSED,
+ ret = ti_sci_setup_one_xfer(TISCI_MSG_WAIT_PROC_BOOT_STATUS, 0,
&req, sizeof(req),
&resp, sizeof(resp),
&xfer);
@@ -1541,91 +1591,92 @@
return ret;
}
- if (!ti_sci_is_response_ack(&resp))
- return -ENODEV;
-
return 0;
}
/**
- * ti_sci_proc_shutdown() - Shutdown Processor without waiting for ACKs
+ * ti_sci_proc_wait_boot_status_no_wait() - Wait for a processor boot status
+ * without requesting or waiting for
+ * a response.
*
- * @proc_id: Processor ID this request is for
- * @dev_id: Device identifier this request is for
+ * @proc_id: Processor ID this request is for
+ * @num_wait_iterations Total number of iterations we will check before
+ * we will timeout and give up
+ * @num_match_iterations How many iterations should we have continued
+ * status to account for status bits glitching.
+ * This is to make sure that match occurs for
+ * consecutive checks. This implies that the
+ * worst case should consider that the stable
+ * time should at the worst be num_wait_iterations
+ * num_match_iterations to prevent timeout.
+ * @delay_per_iteration_us Specifies how long to wait (in micro seconds)
+ * between each status checks. This is the minimum
+ * duration, and overhead of register reads and
+ * checks are on top of this and can vary based on
+ * varied conditions.
+ * @delay_before_iterations_us Specifies how long to wait (in micro seconds)
+ * before the very first check in the first
+ * iteration of status check loop. This is the
+ * minimum duration, and overhead of register
+ * reads and checks are.
+ * @status_flags_1_set_all_wait If non-zero, Specifies that all bits of the
+ * status matching this field requested MUST be 1.
+ * @status_flags_1_set_any_wait If non-zero, Specifies that at least one of the
+ * bits matching this field requested MUST be 1.
+ * @status_flags_1_clr_all_wait If non-zero, Specifies that all bits of the
+ * status matching this field requested MUST be 0.
+ * @status_flags_1_clr_any_wait If non-zero, Specifies that at least one of the
+ * bits matching this field requested MUST be 0.
*
* Return: 0 if all goes well, else appropriate error message
*/
-int ti_sci_proc_shutdown(uint8_t proc_id, uint32_t dev_id)
+int ti_sci_proc_wait_boot_status_no_wait(uint8_t proc_id,
+ uint8_t num_wait_iterations,
+ uint8_t num_match_iterations,
+ uint8_t delay_per_iteration_us,
+ uint8_t delay_before_iterations_us,
+ uint32_t status_flags_1_set_all_wait,
+ uint32_t status_flags_1_set_any_wait,
+ uint32_t status_flags_1_clr_all_wait,
+ uint32_t status_flags_1_clr_any_wait)
{
- struct ti_sci_msg_req_wait_proc_boot_status wait_req;
- struct ti_sci_msg_req_set_device_state set_req;
- /*
- * We will not be waiting for this response, but declare one anyway
- * to pass to the setup function so the checks will still pass
- */
- struct ti_sci_msg_hdr resp;
-
- struct ti_sci_xfer xfer;
+ struct ti_sci_msg_req_wait_proc_boot_status req;
+ struct ti_sci_msg_hdr *hdr;
+ struct k3_sec_proxy_msg tx_message;
int ret;
- /* Start by sending wait command */
+ /* Ensure we have sane transfer size */
+ if (sizeof(req) > info.desc.max_msg_size)
+ return -ERANGE;
+ hdr = (struct ti_sci_msg_hdr *)&req;
+ hdr->seq = info.seq;
+ hdr->type = TISCI_MSG_WAIT_PROC_BOOT_STATUS;
+ hdr->host = info.desc.host_id;
/* Setup with NORESPONSE flag to keep response queue clean */
- ret = ti_sci_setup_one_xfer(TISCI_MSG_WAIT_PROC_BOOT_STATUS,
- TI_SCI_FLAG_REQ_GENERIC_NORESPONSE,
- &wait_req, sizeof(wait_req),
- &resp, sizeof(resp),
- &xfer);
- if (ret) {
- ERROR("Message alloc failed (%d)\n", ret);
- return ret;
- }
-
- wait_req.processor_id = proc_id;
- /*
- * Wait maximum time to give us the best chance to get
- * to WFI before this command timeouts
- */
- wait_req.delay_before_iterations_us = UINT8_MAX;
- wait_req.num_wait_iterations = UINT8_MAX;
- wait_req.delay_per_iteration_us = UINT8_MAX; /* TODO: optimize time */
- wait_req.num_match_iterations = 2;
- wait_req.status_flags_1_set_all_wait = 0;
- /* Wait for either WFE or WFI */
- wait_req.status_flags_1_set_any_wait = PROC_BOOT_STATUS_FLAG_ARMV8_WFE |
- PROC_BOOT_STATUS_FLAG_ARMV8_WFI;
- wait_req.status_flags_1_clr_all_wait = 0;
- wait_req.status_flags_1_clr_any_wait = 0;
-
- /* Send wait message */
- ret = k3_sec_proxy_send(SP_HIGH_PRIORITY, &xfer.tx_message);
- if (ret) {
- ERROR("Message sending failed (%d)\n", ret);
- return ret;
- }
+ hdr->flags = TI_SCI_FLAG_REQ_GENERIC_NORESPONSE;
- /* Now queue up the shutdown request */
- ret = ti_sci_setup_one_xfer(TI_SCI_MSG_SET_DEVICE_STATE,
- TI_SCI_FLAG_REQ_GENERIC_NORESPONSE,
- &set_req, sizeof(set_req),
- &resp, sizeof(resp),
- &xfer);
- if (ret) {
- ERROR("Message alloc failed (%d)\n", ret);
- return ret;
- }
+ req.processor_id = proc_id;
+ req.num_wait_iterations = num_wait_iterations;
+ req.num_match_iterations = num_match_iterations;
+ req.delay_per_iteration_us = delay_per_iteration_us;
+ req.delay_before_iterations_us = delay_before_iterations_us;
+ req.status_flags_1_set_all_wait = status_flags_1_set_all_wait;
+ req.status_flags_1_set_any_wait = status_flags_1_set_any_wait;
+ req.status_flags_1_clr_all_wait = status_flags_1_clr_all_wait;
+ req.status_flags_1_clr_any_wait = status_flags_1_clr_any_wait;
- set_req.id = dev_id;
- set_req.state = MSG_DEVICE_SW_STATE_AUTO_OFF;
+ tx_message.buf = (uint8_t *)&req;
+ tx_message.len = sizeof(req);
- /* Send shutdown message */
- ret = k3_sec_proxy_send(SP_HIGH_PRIORITY, &xfer.tx_message);
+ /* Send message */
+ ret = k3_sec_proxy_send(SP_HIGH_PRIORITY, &tx_message);
if (ret) {
ERROR("Message sending failed (%d)\n", ret);
return ret;
}
- /* Return without waiting for responses */
+ /* Return without waiting for response */
return 0;
}
diff --git a/plat/ti/k3/common/drivers/ti_sci/ti_sci.h b/plat/ti/k3/common/drivers/ti_sci/ti_sci.h
index d07ee61..c7b09b3 100644
--- a/plat/ti/k3/common/drivers/ti_sci/ti_sci.h
+++ b/plat/ti/k3/common/drivers/ti_sci/ti_sci.h
@@ -16,17 +16,12 @@
/**
* Device control operations
*
- * - ti_sci_device_set_state - Set device state helper
- * @flags: flags to setup for the device
- * @state: State to move the device to
- * - ti_sci_device_get_state - Get device state helper
- * @clcnt: Pointer to Context Loss Count
- * @resets: pointer to resets
- * @p_state: pointer to p_state
- * @c_state: pointer to c_state
* - ti_sci_device_get - command to request for device managed by TISCI
+ * - ti_sci_device_get_exclusive - exclusively request a device
* - ti_sci_device_idle - Command to idle a device managed by TISCI
+ * - ti_sci_device_idle_exclusive - exclusively idle a device
* - ti_sci_device_put - command to release a device managed by TISCI
+ * - ti_sci_device_put_no_wait - release a device without waiting for response
* - ti_sci_device_is_valid - Is the device valid
* - ti_sci_device_get_clcnt - Get context loss counter
* @count: Pointer to Context Loss counter to populate
@@ -54,12 +49,12 @@
* usage count by balancing get_device with put_device. No refcounting is
* managed by driver for that purpose.
*/
-int ti_sci_device_set_state(uint32_t id, uint32_t flags, uint8_t state);
-int ti_sci_device_get_state(uint32_t id, uint32_t *clcnt, uint32_t *resets,
- uint8_t *p_state, uint8_t *c_state);
int ti_sci_device_get(uint32_t id);
+int ti_sci_device_get_exclusive(uint32_t id);
int ti_sci_device_idle(uint32_t id);
+int ti_sci_device_idle_exclusive(uint32_t id);
int ti_sci_device_put(uint32_t id);
+int ti_sci_device_put_no_wait(uint32_t id);
int ti_sci_device_is_valid(uint32_t id);
int ti_sci_device_get_clcnt(uint32_t id, uint32_t *count);
int ti_sci_device_is_idle(uint32_t id, bool *r_state);
@@ -72,12 +67,6 @@
/**
* Clock control operations
*
- * - ti_sci_clock_set_state - Set clock state helper
- * @flags: Header flags as needed
- * @state: State to request for the clock.
- * - ti_sci_clock_get_state - Get clock state helper
- * @programmed_state: State requested for clock to move to
- * @current_state: State that the clock is currently in
* - ti_sci_clock_get - Get control of a clock from TI SCI
* @needs_ssc: 'true' iff Spread Spectrum clock is desired
* @can_change_freq: 'true' iff frequency change is desired
@@ -123,10 +112,6 @@
* usage count by balancing get_clock with put_clock. No refcounting is
* managed by driver for that purpose.
*/
-int ti_sci_clock_set_state(uint32_t dev_id, uint8_t clk_id,
- uint32_t flags, uint8_t state);
-int ti_sci_clock_get_state(uint32_t dev_id, uint8_t clk_id,
- uint8_t *programmed_state, uint8_t *current_state);
int ti_sci_clock_get(uint32_t dev_id, uint8_t clk_id,
bool needs_ssc, bool can_change_freq,
bool enable_input_term);
@@ -175,11 +160,13 @@
* - ti_sci_proc_set_boot_ctrl - Command to set the processor boot control flags
* @control_flags_set: Control flags to be set
* @control_flags_clear: Control flags to be cleared
+ * - ti_sci_proc_set_boot_ctrl_no_wait - Same as above without waiting for response
* - ti_sci_proc_auth_boot_image - Command to authenticate and load the image
* and then set the processor configuration flags.
* @cert_addr: Memory address at which payload image certificate is located.
* - ti_sci_proc_get_boot_status - Command to get the processor boot status
* - ti_sci_proc_wait_boot_status - Command to wait for a processor boot status
+ * - ti_sci_proc_wait_boot_status_no_wait - Same as above without waiting for response
*
* NOTE: for all these functions, the following are generic in nature:
* @proc_id: Processor ID
@@ -193,6 +180,9 @@
uint32_t config_flags_clear);
int ti_sci_proc_set_boot_ctrl(uint8_t proc_id, uint32_t control_flags_set,
uint32_t control_flags_clear);
+int ti_sci_proc_set_boot_ctrl_no_wait(uint8_t proc_id,
+ uint32_t control_flags_set,
+ uint32_t control_flags_clear);
int ti_sci_proc_auth_boot_image(uint8_t proc_id, uint64_t cert_addr);
int ti_sci_proc_get_boot_status(uint8_t proc_id, uint64_t *bv,
uint32_t *cfg_flags,
@@ -206,7 +196,15 @@
uint32_t status_flags_1_set_any_wait,
uint32_t status_flags_1_clr_all_wait,
uint32_t status_flags_1_clr_any_wait);
-int ti_sci_proc_shutdown(uint8_t proc_id, uint32_t dev_id);
+int ti_sci_proc_wait_boot_status_no_wait(uint8_t proc_id,
+ uint8_t num_wait_iterations,
+ uint8_t num_match_iterations,
+ uint8_t delay_per_iteration_us,
+ uint8_t delay_before_iterations_us,
+ uint32_t status_flags_1_set_all_wait,
+ uint32_t status_flags_1_set_any_wait,
+ uint32_t status_flags_1_clr_all_wait,
+ uint32_t status_flags_1_clr_any_wait);
/**
* ti_sci_init() - Basic initialization
diff --git a/plat/ti/k3/common/k3_psci.c b/plat/ti/k3/common/k3_psci.c
index 235e639..f66f12a 100644
--- a/plat/ti/k3/common/k3_psci.c
+++ b/plat/ti/k3/common/k3_psci.c
@@ -13,6 +13,7 @@
#include <lib/psci/psci.h>
#include <plat/common/platform.h>
+#include <ti_sci_protocol.h>
#include <k3_gicv3.h>
#include <ti_sci.h>
@@ -70,12 +71,6 @@
return PSCI_E_INTERN_FAIL;
}
- ret = ti_sci_proc_release(proc);
- if (ret) {
- /* this is not fatal */
- WARN("Could not release processor control: %d\n", ret);
- }
-
return PSCI_E_SUCCESS;
}
@@ -90,9 +85,24 @@
proc = PLAT_PROC_START_ID + core_id;
device = PLAT_PROC_DEVICE_START_ID + core_id;
- ret = ti_sci_proc_shutdown(proc, device);
+ /* Start by sending wait for WFI command */
+ ret = ti_sci_proc_wait_boot_status_no_wait(proc,
+ /*
+ * Wait maximum time to give us the best chance to get
+ * to WFI before this command timeouts
+ */
+ UINT8_MAX, 100, UINT8_MAX, UINT8_MAX,
+ /* Wait for WFI */
+ PROC_BOOT_STATUS_FLAG_ARMV8_WFI, 0, 0, 0);
+ if (ret) {
+ ERROR("Sending wait for WFI failed (%d)\n", ret);
+ return;
+ }
+
+ /* Now queue up the core shutdown request */
+ ret = ti_sci_device_put_no_wait(device);
if (ret) {
- ERROR("Request to stop core failed: %d\n", ret);
+ ERROR("Sending core shutdown message failed (%d)\n", ret);
return;
}
}