Enable MTE support unilaterally for Normal World
This patch enables MTE for Normal world if the CPU suppors it. Enabling
MTE for secure world will be done later.
Change-Id: I9ef64460beaba15e9a9c20ab02da4fb2208b6f7d
Signed-off-by: Soby Mathew <soby.mathew@arm.com>
diff --git a/include/arch/aarch64/arch.h b/include/arch/aarch64/arch.h
index 502b868..fdc1b64 100644
--- a/include/arch/aarch64/arch.h
+++ b/include/arch/aarch64/arch.h
@@ -219,6 +219,13 @@
#define BTI_IMPLEMENTED ULL(1) /* The BTI mechanism is implemented */
+#define ID_AA64PFR1_EL1_MTE_SHIFT U(8)
+#define ID_AA64PFR1_EL1_MTE_MASK ULL(0xf)
+
+#define MTE_UNIMPLEMENTED ULL(0)
+#define MTE_IMPLEMENTED_EL0 ULL(1) /* MTE is only implemented at EL0 */
+#define MTE_IMPLEMENTED_ELX ULL(2) /* MTE is implemented at all ELs */
+
/* ID_PFR1_EL1 definitions */
#define ID_PFR1_VIRTEXT_SHIFT U(12)
#define ID_PFR1_VIRTEXT_MASK U(0xf)
@@ -276,6 +283,7 @@
/* SCR definitions */
#define SCR_RES1_BITS ((U(1) << 4) | (U(1) << 5))
+#define SCR_ATA_BIT (U(1) << 26)
#define SCR_FIEN_BIT (U(1) << 21)
#define SCR_API_BIT (U(1) << 17)
#define SCR_APK_BIT (U(1) << 16)
diff --git a/include/arch/aarch64/arch_features.h b/include/arch/aarch64/arch_features.h
index 1129b8e..2f29f48 100644
--- a/include/arch/aarch64/arch_features.h
+++ b/include/arch/aarch64/arch_features.h
@@ -54,4 +54,10 @@
ID_AA64PFR1_EL1_BT_MASK) == BTI_IMPLEMENTED;
}
+static inline unsigned int get_armv8_5_mte_support(void)
+{
+ return ((read_id_aa64pfr1_el1() >> ID_AA64PFR1_EL1_MTE_SHIFT) &
+ ID_AA64PFR1_EL1_MTE_MASK);
+}
+
#endif /* ARCH_FEATURES_H */
diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c
index 89d7ed6..05ba5ed 100644
--- a/lib/el3_runtime/aarch64/context_mgmt.c
+++ b/lib/el3_runtime/aarch64/context_mgmt.c
@@ -12,6 +12,7 @@
#include <arch.h>
#include <arch_helpers.h>
+#include <arch_features.h>
#include <bl31/interrupt_mgmt.h>
#include <common/bl_common.h>
#include <context.h>
@@ -136,6 +137,18 @@
scr_el3 |= SCR_API_BIT | SCR_APK_BIT;
#endif /* !CTX_INCLUDE_PAUTH_REGS */
+ unsigned int mte = get_armv8_5_mte_support();
+
+ /*
+ * Enable MTE support unilaterally for normal world if the CPU supports
+ * it.
+ */
+ if (mte != MTE_UNIMPLEMENTED) {
+ if (security_state == NON_SECURE) {
+ scr_el3 |= SCR_ATA_BIT;
+ }
+ }
+
#ifdef IMAGE_BL31
/*
* SCR_EL3.IRQ, SCR_EL3.FIQ: Enable the physical FIQ and IRQ routing as