commit 8258f141b75060fd1328fd9e549b51f76303b8ef
author Andre Przywara <andre.przywara@arm.com> Wed Feb 15 15:56:15 2023 +0000
committer Andre Przywara <andre.przywara@arm.com> Mon Feb 27 18:04:14 2023 +0000
tree ee62cea18cb8d9d7a6261346575b8fbfda7fa972
parent 2f3e79ae1266e3fe7d3719e5153e2cf67de0f96f

fix(cpufeat): context-switch: move FGT availability check to callers

To be inline with other features, and to allow the availability to be
checked for different contexts, move the FGT availability check out of
the save/restore functions. This is instead now checked at the caller.

Change-Id: I96e0638714f9d1b6fdadc1cb989cbd33bd48b1f6
Signed-off-by: Andre Przywara <andre.przywara@arm.com>

lib/el3_runtime/aarch64/context_mgmt.c

diff --git a/lib/el3_runtime/aarch64/context_mgmt.c b/lib/el3_runtime/aarch64/context_mgmt.c
index dab25d6..341c4a5 100644
--- a/lib/el3_runtime/aarch64/context_mgmt.c
+++ b/lib/el3_runtime/aarch64/context_mgmt.c
@@ -805,30 +805,26 @@
 
 static void el2_sysregs_context_save_fgt(el2_sysregs_t *ctx)
 {
-	if (is_feat_fgt_supported()) {
-		write_ctx_reg(ctx, CTX_HDFGRTR_EL2, read_hdfgrtr_el2());
-		if (is_feat_amu_supported()) {
-			write_ctx_reg(ctx, CTX_HAFGRTR_EL2, read_hafgrtr_el2());
-		}
-		write_ctx_reg(ctx, CTX_HDFGWTR_EL2, read_hdfgwtr_el2());
-		write_ctx_reg(ctx, CTX_HFGITR_EL2, read_hfgitr_el2());
-		write_ctx_reg(ctx, CTX_HFGRTR_EL2, read_hfgrtr_el2());
-		write_ctx_reg(ctx, CTX_HFGWTR_EL2, read_hfgwtr_el2());
+	write_ctx_reg(ctx, CTX_HDFGRTR_EL2, read_hdfgrtr_el2());
+	if (is_feat_amu_supported()) {
+		write_ctx_reg(ctx, CTX_HAFGRTR_EL2, read_hafgrtr_el2());
 	}
+	write_ctx_reg(ctx, CTX_HDFGWTR_EL2, read_hdfgwtr_el2());
+	write_ctx_reg(ctx, CTX_HFGITR_EL2, read_hfgitr_el2());
+	write_ctx_reg(ctx, CTX_HFGRTR_EL2, read_hfgrtr_el2());
+	write_ctx_reg(ctx, CTX_HFGWTR_EL2, read_hfgwtr_el2());
 }
 
 static void el2_sysregs_context_restore_fgt(el2_sysregs_t *ctx)
 {
-	if (is_feat_fgt_supported()) {
-		write_hdfgrtr_el2(read_ctx_reg(ctx, CTX_HDFGRTR_EL2));
-		if (is_feat_amu_supported()) {
-			write_hafgrtr_el2(read_ctx_reg(ctx, CTX_HAFGRTR_EL2));
-		}
-		write_hdfgwtr_el2(read_ctx_reg(ctx, CTX_HDFGWTR_EL2));
-		write_hfgitr_el2(read_ctx_reg(ctx, CTX_HFGITR_EL2));
-		write_hfgrtr_el2(read_ctx_reg(ctx, CTX_HFGRTR_EL2));
-		write_hfgwtr_el2(read_ctx_reg(ctx, CTX_HFGWTR_EL2));
+	write_hdfgrtr_el2(read_ctx_reg(ctx, CTX_HDFGRTR_EL2));
+	if (is_feat_amu_supported()) {
+		write_hafgrtr_el2(read_ctx_reg(ctx, CTX_HAFGRTR_EL2));
 	}
+	write_hdfgwtr_el2(read_ctx_reg(ctx, CTX_HDFGWTR_EL2));
+	write_hfgitr_el2(read_ctx_reg(ctx, CTX_HFGITR_EL2));
+	write_hfgrtr_el2(read_ctx_reg(ctx, CTX_HFGRTR_EL2));
+	write_hfgwtr_el2(read_ctx_reg(ctx, CTX_HFGWTR_EL2));
 }
 
 /*******************************************************************************
@@ -863,7 +859,9 @@
 		el2_sysregs_context_save_mpam(el2_sysregs_ctx);
 #endif
 
-		el2_sysregs_context_save_fgt(el2_sysregs_ctx);
+		if (is_feat_fgt_supported()) {
+			el2_sysregs_context_save_fgt(el2_sysregs_ctx);
+		}
 
 #if ENABLE_FEAT_ECV
 		el2_sysregs_context_save_ecv(el2_sysregs_ctx);
@@ -921,7 +919,9 @@
 		el2_sysregs_context_restore_mpam(el2_sysregs_ctx);
 #endif
 
-		el2_sysregs_context_restore_fgt(el2_sysregs_ctx);
+		if (is_feat_fgt_supported()) {
+			el2_sysregs_context_restore_fgt(el2_sysregs_ctx);
+		}
 
 #if ENABLE_FEAT_ECV
 		el2_sysregs_context_restore_ecv(el2_sysregs_ctx);