commit 81da558f211864898ae7d2ccf1ddcf3c562eae88
author Arunachalam Ganapathy <arunachalam.ganapathy@arm.com> Tue Sep 22 12:47:33 2020 +0100
committer Manish Pandey <manish.pandey2@arm.com> Tue Oct 20 20:07:06 2020 +0000
tree ee0fcdd6112123cdebf78d244624e82b568aec3e
parent 40618cfe13988b732094d05e4ab87ebaf1b2eaa8

plat: tc0: Add TZC DRAM1 region for SPMC and trusted OS

- Reserve 32MB below ARM_AP_TZC_DRAM1_BASE for TC0_TZC_DRAM1
- Add TC0_NS_DRAM1 base and mapping
- Reserve memory region in tc0.dts

Change-Id: If2431f7f68e4255e28c86a0e89637dab7c424a13
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>

fdts/tc0.dts

diff --git a/fdts/tc0.dts b/fdts/tc0.dts
index 15c14ca..763c813 100644
--- a/fdts/tc0.dts
+++ b/fdts/tc0.dts
@@ -106,7 +106,7 @@
 
 	memory@80000000 {
 		device_type = "memory";
-		reg = <0x0 0x80000000 0x0 0x80000000>;
+		reg = <0x0 0x80000000 0x0 0x7d000000>;
 	};
 
 	psci {