Use a callee-saved register to be AAPCS-compliant
x8 is not a callee-saved register and can be corrupted.
Use x19 instead to be AAPCS-compliant.
Fixes ARM-software/tf-issues#478
Change-Id: Ib4f114c36f4c11351ae856f953c45dca92b27c3b
Signed-off-by: dp-arm <dimitris.papastamos@arm.com>
diff --git a/lib/cpus/aarch64/cpu_helpers.S b/lib/cpus/aarch64/cpu_helpers.S
index 7ad0bc7..2384553 100644
--- a/lib/cpus/aarch64/cpu_helpers.S
+++ b/lib/cpus/aarch64/cpu_helpers.S
@@ -259,8 +259,8 @@
/*
* Printing errata status requires atomically testing the printed flag.
*/
- stp x8, x30, [sp, #-16]!
- mov x8, x0
+ stp x19, x30, [sp, #-16]!
+ mov x19, x0
/*
* Load pointers to errata lock and printed flag. Call
@@ -270,8 +270,8 @@
ldr x0, [x1, #CPU_ERRATA_LOCK]
ldr x1, [x1, #CPU_ERRATA_PRINTED]
bl errata_needs_reporting
- mov x1, x8
- ldp x8, x30, [sp], #16
+ mov x1, x19
+ ldp x19, x30, [sp], #16
cbnz x0, .Lprint
#endif
.Lnoprint: