feat(ethos-n): add separate RO and RW NSAIDs
To be able to further restrict the memory access for the Arm(R)
Ethos(TM)-N NPU, separate read-only and read/write NSAIDs for the
non-protected and protected memory have been added to the Juno
platform's TZMP1 TZC configuration for the NPU.
The platform definition has been updated accordingly and the NPU driver
will now only give read/write access to the streams that require it.
Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: I5a173500fc1943a5cd406a3b379e1f1f554eeda6
diff --git a/drivers/arm/ethosn/ethosn_smc.c b/drivers/arm/ethosn/ethosn_smc.c
index 6558566..85a12c5 100644
--- a/drivers/arm/ethosn/ethosn_smc.c
+++ b/drivers/arm/ethosn/ethosn_smc.c
@@ -94,11 +94,12 @@
#define SEC_NPU_ID_REG U(0xF000)
#define SEC_NPU_ID_ARCH_VER_SHIFT U(0X10)
-#define FIRMWARE_STREAM_INDEX U(0x0)
+#define FIRMWARE_STREAM_INDEX U(0x0)
+#define WORKING_STREAM_INDEX U(0x1)
#define PLE_STREAM_INDEX U(0x4)
-#define INPUT_STREAM_INDEX U(0x6)
-#define INTERMEDIATE_STREAM_INDEX U(0x7)
-#define OUTPUT_STREAM_INDEX U(0x8)
+#define INPUT_STREAM_INDEX U(0x6)
+#define INTERMEDIATE_STREAM_INDEX U(0x7)
+#define OUTPUT_STREAM_INDEX U(0x8)
#define TO_EXTEND_ADDR(addr) \
((addr >> SEC_ADDR_EXT_SHIFT) & SEC_ADDR_EXT_MASK)
@@ -154,16 +155,23 @@
bool is_protected)
{
size_t i;
- uint32_t streams[9] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
+ uint32_t streams[9] = {[0 ... 8] = ARM_ETHOSN_NPU_NS_RO_DATA_NSAID};
streams[FIRMWARE_STREAM_INDEX] = ARM_ETHOSN_NPU_PROT_FW_NSAID;
streams[PLE_STREAM_INDEX] = ARM_ETHOSN_NPU_PROT_FW_NSAID;
+ streams[WORKING_STREAM_INDEX] = ARM_ETHOSN_NPU_NS_RW_DATA_NSAID;
+
if (is_protected) {
- streams[INPUT_STREAM_INDEX] = ARM_ETHOSN_NPU_PROT_DATA_NSAID;
+ streams[INPUT_STREAM_INDEX] = ARM_ETHOSN_NPU_PROT_RO_DATA_NSAID;
+ streams[INTERMEDIATE_STREAM_INDEX] =
+ ARM_ETHOSN_NPU_PROT_RW_DATA_NSAID;
+ streams[OUTPUT_STREAM_INDEX] = ARM_ETHOSN_NPU_PROT_RW_DATA_NSAID;
+ } else {
+ streams[INPUT_STREAM_INDEX] = ARM_ETHOSN_NPU_NS_RO_DATA_NSAID;
streams[INTERMEDIATE_STREAM_INDEX] =
- ARM_ETHOSN_NPU_PROT_DATA_NSAID;
- streams[OUTPUT_STREAM_INDEX] = ARM_ETHOSN_NPU_PROT_DATA_NSAID;
+ ARM_ETHOSN_NPU_NS_RW_DATA_NSAID;
+ streams[OUTPUT_STREAM_INDEX] = ARM_ETHOSN_NPU_NS_RW_DATA_NSAID;
}
for (i = 0U; i < ARRAY_SIZE(streams); ++i) {