drivers: marvell: add support for secure read/write of dfx register-set
Since the dfx register set is going to be marked as secure expose dfx
secure read and write function via SiP services. In introduced misc_dfx
driver some registers are white-listed so non-secure software can still
access them.
This will allow non-secure word drivers access some white-listed
registers related to e.g.: Sample at reset, efuses, SoC type and
revision ID accesses.
Change-Id: If9ae2da51ab2e6ca62b9a2c940819259bf25edc0
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-on: https://sj1git1.cavium.com/25055
Tested-by: Kostya Porotchkin <kostap@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
diff --git a/plat/marvell/armada/a8k/common/a8k_common.mk b/plat/marvell/armada/a8k/common/a8k_common.mk
index dcb64ce..3acc3b4 100644
--- a/plat/marvell/armada/a8k/common/a8k_common.mk
+++ b/plat/marvell/armada/a8k/common/a8k_common.mk
@@ -116,6 +116,7 @@
$(MARVELL_DRV_BASE)/mc_trustzone/mc_trustzone.c \
$(MARVELL_DRV_BASE)/mg_conf_cm3/mg_conf_cm3.c \
$(MARVELL_DRV_BASE)/secure_dfx_access/armada_thermal.c \
+ $(MARVELL_DRV_BASE)/secure_dfx_access/misc_dfx.c \
$(MARVELL_DRV_BASE)/ddr_phy_access.c \
drivers/rambus/trng_ip_76.c