Remove dashes from image names: 'BL3-x' --> 'BL3x'
This patch removes the dash character from the image name, to
follow the image terminology in the Trusted Firmware Wiki page:
https://github.com/ARM-software/arm-trusted-firmware/wiki
Changes apply to output messages, comments and documentation.
non-ARM platform files have been left unmodified.
Change-Id: Ic2a99be4ed929d52afbeb27ac765ceffce46ed76
diff --git a/include/common/bl_common.h b/include/common/bl_common.h
index b7cb95a..0ec7a8d 100644
--- a/include/common/bl_common.h
+++ b/include/common/bl_common.h
@@ -245,14 +245,14 @@
* This structure represents the superset of information that can be passed to
* BL31 e.g. while passing control to it from BL2. The BL32 parameters will be
* populated only if BL2 detects its presence. A pointer to a structure of this
- * type should be passed in X0 to BL3-1's cold boot entrypoint.
+ * type should be passed in X0 to BL31's cold boot entrypoint.
*
- * Use of this structure and the X0 parameter is not mandatory: the BL3-1
+ * Use of this structure and the X0 parameter is not mandatory: the BL31
* platform code can use other mechanisms to provide the necessary information
- * about BL3-2 and BL3-3 to the common and SPD code.
+ * about BL32 and BL33 to the common and SPD code.
*
- * BL3-1 image information is mandatory if this structure is used. If either of
- * the optional BL3-2 and BL3-3 image information is not provided, this is
+ * BL31 image information is mandatory if this structure is used. If either of
+ * the optional BL32 and BL33 image information is not provided, this is
* indicated by the respective image_info pointers being zero.
******************************************************************************/
typedef struct bl31_params {
diff --git a/include/common/el3_common_macros.S b/include/common/el3_common_macros.S
index 0514e2a..6f7136f 100644
--- a/include/common/el3_common_macros.S
+++ b/include/common/el3_common_macros.S
@@ -104,7 +104,7 @@
/* -----------------------------------------------------------------------------
* This is the super set of actions that need to be performed during a cold boot
- * or a warm boot in EL3. This code is shared by BL1 and BL3-1.
+ * or a warm boot in EL3. This code is shared by BL1 and BL31.
*
* This macro will always perform reset handling, architectural initialisations
* and stack setup. The rest of the actions are optional because they might not
diff --git a/include/lib/cpus/aarch64/cpu_macros.S b/include/lib/cpus/aarch64/cpu_macros.S
index 72c35fb..f34f078 100644
--- a/include/lib/cpus/aarch64/cpu_macros.S
+++ b/include/lib/cpus/aarch64/cpu_macros.S
@@ -46,7 +46,7 @@
CPU_RESET_FUNC: /* cpu_ops reset_func */
.space 8
#endif
-#if IMAGE_BL31 /* The power down core and cluster is needed only in BL3-1 */
+#if IMAGE_BL31 /* The power down core and cluster is needed only in BL31 */
CPU_PWR_DWN_CORE: /* cpu_ops core_pwr_dwn */
.space 8
CPU_PWR_DWN_CLUSTER: /* cpu_ops cluster_pwr_dwn */
diff --git a/include/plat/arm/common/aarch64/arm_macros.S b/include/plat/arm/common/aarch64/arm_macros.S
index eaaa62f..384bb51 100644
--- a/include/plat/arm/common/aarch64/arm_macros.S
+++ b/include/plat/arm/common/aarch64/arm_macros.S
@@ -57,7 +57,7 @@
/* ---------------------------------------------
* The below utility macro prints out relevant GIC
* registers whenever an unhandled exception is
- * taken in BL3-1 on ARM standard platforms.
+ * taken in BL31 on ARM standard platforms.
* Expects: GICD base in x16, GICC base in x17
* Clobbers: x0 - x10, sp
* ---------------------------------------------
@@ -125,7 +125,7 @@
/* ------------------------------------------------
* The below required platform porting macro prints
* out relevant interconnect registers whenever an
- * unhandled exception is taken in BL3-1.
+ * unhandled exception is taken in BL31.
* Clobbers: x0 - x9, sp
* ------------------------------------------------
*/
diff --git a/include/plat/arm/common/arm_def.h b/include/plat/arm/common/arm_def.h
index 4a50c1c..b2db616 100644
--- a/include/plat/arm/common/arm_def.h
+++ b/include/plat/arm/common/arm_def.h
@@ -41,7 +41,7 @@
* Definitions common to all ARM standard platforms
*****************************************************************************/
-/* Special value used to verify platform parameters from BL2 to BL3-1 */
+/* Special value used to verify platform parameters from BL2 to BL31 */
#define ARM_BL31_PLAT_PARAM_VAL 0x0f1e2d3c4b5a6978ULL
#define ARM_CLUSTER_COUNT 2
@@ -257,7 +257,7 @@
* BL2 specific defines.
******************************************************************************/
/*
- * Put BL2 just below BL3-1. BL2_BASE is calculated using the current BL2 debug
+ * Put BL2 just below BL31. BL2_BASE is calculated using the current BL2 debug
* size plus a little space for growth.
*/
#if TRUSTED_BOARD_BOOT
@@ -268,11 +268,11 @@
#define BL2_LIMIT BL31_BASE
/*******************************************************************************
- * BL3-1 specific defines.
+ * BL31 specific defines.
******************************************************************************/
/*
- * Put BL3-1 at the top of the Trusted SRAM. BL31_BASE is calculated using the
- * current BL3-1 debug size plus a little space for growth.
+ * Put BL31 at the top of the Trusted SRAM. BL31_BASE is calculated using the
+ * current BL31 debug size plus a little space for growth.
*/
#define BL31_BASE (ARM_BL_RAM_BASE + \
ARM_BL_RAM_SIZE - \
@@ -281,7 +281,7 @@
#define BL31_LIMIT (ARM_BL_RAM_BASE + ARM_BL_RAM_SIZE)
/*******************************************************************************
- * BL3-2 specific defines.
+ * BL32 specific defines.
******************************************************************************/
/*
* On ARM standard platforms, the TSP can execute from Trusted SRAM,
diff --git a/include/plat/arm/common/plat_arm.h b/include/plat/arm/common/plat_arm.h
index 32c062d..3b6a04b 100644
--- a/include/plat/arm/common/plat_arm.h
+++ b/include/plat/arm/common/plat_arm.h
@@ -87,7 +87,7 @@
#else
/*
- * Empty macros for all other BL stages other than BL3-1
+ * Empty macros for all other BL stages other than BL31
*/
#define ARM_INSTANTIATE_LOCK
#define arm_lock_init()
@@ -171,7 +171,7 @@
void arm_bl2u_platform_setup(void);
void arm_bl2u_plat_arch_setup(void);
-/* BL3-1 utility functions */
+/* BL31 utility functions */
void arm_bl31_early_platform_setup(bl31_params_t *from_bl2,
void *plat_params_from_bl2);
void arm_bl31_platform_setup(void);
diff --git a/include/plat/arm/css/common/aarch64/css_macros.S b/include/plat/arm/css/common/aarch64/css_macros.S
index 9f18e09..9124fdc 100644
--- a/include/plat/arm/css/common/aarch64/css_macros.S
+++ b/include/plat/arm/css/common/aarch64/css_macros.S
@@ -36,7 +36,7 @@
/* ---------------------------------------------
* The below required platform porting macro
* prints out relevant GIC registers whenever an
- * unhandled exception is taken in BL3-1.
+ * unhandled exception is taken in BL31.
* Clobbers: x0 - x10, x16, x17, sp
* ---------------------------------------------
*/
diff --git a/include/plat/arm/css/common/css_def.h b/include/plat/arm/css/common/css_def.h
index dcc7790..c900278 100644
--- a/include/plat/arm/css/common/css_def.h
+++ b/include/plat/arm/css/common/css_def.h
@@ -111,8 +111,8 @@
/*
* Load address of SCP_BL2 in CSS platform ports
- * SCP_BL2 is loaded to the same place as BL3-1. Once SCP_BL2 is transferred to the
- * SCP, it is discarded and BL3-1 is loaded over the top.
+ * SCP_BL2 is loaded to the same place as BL31. Once SCP_BL2 is transferred to the
+ * SCP, it is discarded and BL31 is loaded over the top.
*/
#define SCP_BL2_BASE BL31_BASE
diff --git a/include/plat/common/common_def.h b/include/plat/common/common_def.h
index 4175b14..744c22e 100644
--- a/include/plat/common/common_def.h
+++ b/include/plat/common/common_def.h
@@ -55,7 +55,7 @@
* avoid subtle integer overflow errors due to implicit integer type promotion
* when working with 32-bit values.
*
- * The TSP linker script includes some of these definitions to define the BL3-2
+ * The TSP linker script includes some of these definitions to define the BL32
* memory map, but the GNU LD does not support the 'ull' suffix, causing the
* build process to fail. To solve this problem, the auxiliary macro MAKE_ULL(x)
* will add the 'ull' suffix only when the macro __LINKER__ is not defined
diff --git a/include/plat/common/platform.h b/include/plat/common/platform.h
index b6a037f..c21f9ee 100644
--- a/include/plat/common/platform.h
+++ b/include/plat/common/platform.h
@@ -134,7 +134,7 @@
/*
* This function returns a pointer to the shared memory that the platform has
- * kept aside to pass trusted firmware related information that BL3-1
+ * kept aside to pass trusted firmware related information that BL31
* could need
*/
struct bl31_params *bl2_plat_get_bl31_params(void);
@@ -147,14 +147,14 @@
/*
* This function flushes to main memory all the params that are
- * passed to BL3-1
+ * passed to BL31
*/
void bl2_plat_flush_bl31_params(void);
/*
* The next 2 functions allow the platform to change the entrypoint information
- * for the mandatory 3rd level BL images, BL3-1 and BL3-3. This is done after
- * BL2 has loaded those images into memory but before BL3-1 is executed.
+ * for the mandatory 3rd level BL images, BL31 and BL33. This is done after
+ * BL2 has loaded those images into memory but before BL31 is executed.
*/
void bl2_plat_set_bl31_ep_info(struct image_info *image,
struct entry_point_info *ep);
@@ -162,7 +162,7 @@
void bl2_plat_set_bl33_ep_info(struct image_info *image,
struct entry_point_info *ep);
-/* Gets the memory layout for BL3-3 */
+/* Gets the memory layout for BL33 */
void bl2_plat_get_bl33_meminfo(struct meminfo *mem_info);
/*******************************************************************************
@@ -179,13 +179,13 @@
int bl2_plat_handle_scp_bl2(struct image_info *scp_bl2_image_info);
/*******************************************************************************
- * Conditionally mandatory BL2 functions: must be implemented if BL3-2 image
+ * Conditionally mandatory BL2 functions: must be implemented if BL32 image
* is supported
******************************************************************************/
void bl2_plat_set_bl32_ep_info(struct image_info *image,
struct entry_point_info *ep);
-/* Gets the memory layout for BL3-2 */
+/* Gets the memory layout for BL32 */
void bl2_plat_get_bl32_meminfo(struct meminfo *mem_info);
/*******************************************************************************
@@ -210,7 +210,7 @@
int bl2u_plat_handle_scp_bl2u(void);
/*******************************************************************************
- * Mandatory BL3-1 functions
+ * Mandatory BL31 functions
******************************************************************************/
void bl31_early_platform_setup(struct bl31_params *from_bl2,
void *plat_params_from_bl2);
@@ -220,26 +220,26 @@
struct entry_point_info *bl31_plat_get_next_image_ep_info(uint32_t type);
/*******************************************************************************
- * Mandatory PSCI functions (BL3-1)
+ * Mandatory PSCI functions (BL31)
******************************************************************************/
int plat_setup_psci_ops(uintptr_t sec_entrypoint,
const struct plat_psci_ops **);
const unsigned char *plat_get_power_domain_tree_desc(void);
/*******************************************************************************
- * Optional PSCI functions (BL3-1).
+ * Optional PSCI functions (BL31).
******************************************************************************/
plat_local_state_t plat_get_target_pwr_state(unsigned int lvl,
const plat_local_state_t *states,
unsigned int ncpu);
/*******************************************************************************
- * Optional BL3-1 functions (may be overridden)
+ * Optional BL31 functions (may be overridden)
******************************************************************************/
void bl31_plat_enable_mmu(uint32_t flags);
/*******************************************************************************
- * Optional BL3-2 functions (may be overridden)
+ * Optional BL32 functions (may be overridden)
******************************************************************************/
void bl32_plat_enable_mmu(uint32_t flags);
@@ -261,7 +261,7 @@
unsigned int platform_get_core_pos(unsigned long mpidr);
/*******************************************************************************
- * Mandatory PSCI Compatibility functions (BL3-1)
+ * Mandatory PSCI Compatibility functions (BL31)
******************************************************************************/
int platform_setup_pm(const plat_pm_ops_t **);