Enable -Wshadow always
Variable shadowing is, according to the C standard, permitted and valid
behaviour. However, allowing a local variable to take the same name as a
global one can cause confusion and can make refactoring and bug hunting
more difficult.
This patch moves -Wshadow from WARNING2 into the general warning group
so it is always used. It also fixes all warnings that this introduces
by simply renaming the local variable to a new name
Change-Id: I6b71bdce6580c6e58b5e0b41e4704ab0aa38576e
Signed-off-by: Justin Chadwell <justin.chadwell@arm.com>
diff --git a/Makefile b/Makefile
index 65d4629..0582061 100644
--- a/Makefile
+++ b/Makefile
@@ -230,7 +230,7 @@
# General warnings
WARNINGS := -Wall -Wmissing-include-dirs -Wunused \
- -Wdisabled-optimization -Wvla \
+ -Wdisabled-optimization -Wvla -Wshadow \
-Wno-unused-parameter
# Additional warnings
@@ -242,10 +242,10 @@
WARNING1 += -Wold-style-definition
WARNING1 += -Wunused-const-variable
+# Level 2
WARNING2 := -Waggregate-return
WARNING2 += -Wcast-align
WARNING2 += -Wnested-externs
-WARNING2 += -Wshadow
WARNING2 += -Wlogical-op
WARNING3 := -Wbad-function-cast
diff --git a/drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram.c b/drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram.c
index 9f7c954..1d6e83a 100644
--- a/drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram.c
+++ b/drivers/staging/renesas/rcar/ddr/ddr_b/boot_init_dram.c
@@ -254,10 +254,10 @@
static uint32_t ddrtbl_getval(uint32_t *tbl, uint32_t _regdef);
static uint32_t ddrphy_regif_chk(void);
static inline void ddrphy_regif_idle(void);
-static uint16_t _f_scale(uint32_t ddr_mbps, uint32_t ddr_mbpsdiv, uint32_t ps,
+static uint16_t _f_scale(uint32_t _ddr_mbps, uint32_t _ddr_mbpsdiv, uint32_t ps,
uint16_t cyc);
-static void _f_scale_js2(uint32_t ddr_mbps, uint32_t ddr_mbpsdiv,
- uint16_t *js2);
+static void _f_scale_js2(uint32_t _ddr_mbps, uint32_t _ddr_mbpsdiv,
+ uint16_t *_js2);
static int16_t _f_scale_adj(int16_t ps);
static void ddrtbl_load(void);
static void ddr_config_sub(void);
@@ -991,15 +991,15 @@
static uint8_t RL;
static uint8_t WL;
-static uint16_t _f_scale(uint32_t ddr_mbps, uint32_t ddr_mbpsdiv, uint32_t ps,
+static uint16_t _f_scale(uint32_t _ddr_mbps, uint32_t _ddr_mbpsdiv, uint32_t ps,
uint16_t cyc)
{
uint32_t tmp;
uint32_t div;
- tmp = (((uint32_t)(ps) + 9) / 10) * ddr_mbps;
- div = tmp / (200000 * ddr_mbpsdiv);
- if (tmp != (div * 200000 * ddr_mbpsdiv))
+ tmp = (((uint32_t)(ps) + 9) / 10) * _ddr_mbps;
+ div = tmp / (200000 * _ddr_mbpsdiv);
+ if (tmp != (div * 200000 * _ddr_mbpsdiv))
div = div + 1;
if (div > cyc)
@@ -1007,19 +1007,19 @@
return cyc;
}
-static void _f_scale_js2(uint32_t ddr_mbps, uint32_t ddr_mbpsdiv,
- uint16_t *js2)
+static void _f_scale_js2(uint32_t _ddr_mbps, uint32_t _ddr_mbpsdiv,
+ uint16_t *_js2)
{
int i;
for (i = 0; i < JS2_TBLCNT; i++) {
- js2[i] = _f_scale(ddr_mbps, ddr_mbpsdiv,
+ _js2[i] = _f_scale(_ddr_mbps, _ddr_mbpsdiv,
1UL * jedec_spec2[JS2_DERATE][i].ps,
jedec_spec2[JS2_DERATE][i].cyc);
}
- js2[js2_trcpb] = js2[js2_tras] + js2[js2_trppb];
- js2[js2_trcab] = js2[js2_tras] + js2[js2_trpab];
+ _js2[js2_trcpb] = _js2[js2_tras] + _js2[js2_trppb];
+ _js2[js2_trcab] = _js2[js2_tras] + _js2[js2_trpab];
}
/* scaler for DELAY value */
diff --git a/plat/layerscape/common/ns_access.c b/plat/layerscape/common/ns_access.c
index b84fdbd..9717c72 100644
--- a/plat/layerscape/common/ns_access.c
+++ b/plat/layerscape/common/ns_access.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -13,7 +13,7 @@
#include "ns_access.h"
-static void enable_devices_ns_access(struct csu_ns_dev *ns_dev, uint32_t num)
+static void enable_devices_ns_access(struct csu_ns_dev *_ns_dev, uint32_t num)
{
uint32_t *base = (uint32_t *)CONFIG_SYS_FSL_CSU_ADDR;
uint32_t *reg;
@@ -21,14 +21,14 @@
int i;
for (i = 0; i < num; i++) {
- reg = base + ns_dev[i].ind / 2;
+ reg = base + _ns_dev[i].ind / 2;
val = be32toh(mmio_read_32((uintptr_t)reg));
- if (ns_dev[i].ind % 2 == 0) {
+ if (_ns_dev[i].ind % 2 == 0) {
val &= 0x0000ffff;
- val |= ns_dev[i].val << 16;
+ val |= _ns_dev[i].val << 16;
} else {
val &= 0xffff0000;
- val |= ns_dev[i].val;
+ val |= _ns_dev[i].val;
}
mmio_write_32((uintptr_t)reg, htobe32(val));
}
diff --git a/plat/mediatek/mt8173/drivers/spm/spm_suspend.c b/plat/mediatek/mt8173/drivers/spm/spm_suspend.c
index 5021695..838455d 100644
--- a/plat/mediatek/mt8173/drivers/spm/spm_suspend.c
+++ b/plat/mediatek/mt8173/drivers/spm/spm_suspend.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -239,13 +239,13 @@
/*
* go_to_sleep_before_wfi() - trigger SPM to enter suspend scenario
*/
-static void go_to_sleep_before_wfi(const unsigned int spm_flags)
+static void go_to_sleep_before_wfi(const unsigned int flags_spm)
{
struct pwr_ctrl *pwrctrl;
pwrctrl = &spm_ctrl;
- set_pwrctrl_pcm_flags(pwrctrl, spm_flags);
+ set_pwrctrl_pcm_flags(pwrctrl, flags_spm);
spm_set_sysclk_settle();
diff --git a/plat/renesas/rcar/bl2_plat_setup.c b/plat/renesas/rcar/bl2_plat_setup.c
index ebe6ddd..b4762f3 100644
--- a/plat/renesas/rcar/bl2_plat_setup.c
+++ b/plat/renesas/rcar/bl2_plat_setup.c
@@ -408,7 +408,7 @@
return &bl2_tzram_layout;
}
-static void bl2_populate_compatible_string(void *fdt)
+static void bl2_populate_compatible_string(void *dt)
{
uint32_t board_type;
uint32_t board_rev;
@@ -419,32 +419,32 @@
rcar_get_board_type(&board_type, &board_rev);
switch (board_type) {
case BOARD_SALVATOR_X:
- ret = fdt_setprop_string(fdt, 0, "compatible",
+ ret = fdt_setprop_string(dt, 0, "compatible",
"renesas,salvator-x");
break;
case BOARD_SALVATOR_XS:
- ret = fdt_setprop_string(fdt, 0, "compatible",
+ ret = fdt_setprop_string(dt, 0, "compatible",
"renesas,salvator-xs");
break;
case BOARD_STARTER_KIT:
- ret = fdt_setprop_string(fdt, 0, "compatible",
+ ret = fdt_setprop_string(dt, 0, "compatible",
"renesas,m3ulcb");
break;
case BOARD_STARTER_KIT_PRE:
- ret = fdt_setprop_string(fdt, 0, "compatible",
+ ret = fdt_setprop_string(dt, 0, "compatible",
"renesas,h3ulcb");
break;
case BOARD_EAGLE:
- ret = fdt_setprop_string(fdt, 0, "compatible",
+ ret = fdt_setprop_string(dt, 0, "compatible",
"renesas,eagle");
break;
case BOARD_EBISU:
case BOARD_EBISU_4D:
- ret = fdt_setprop_string(fdt, 0, "compatible",
+ ret = fdt_setprop_string(dt, 0, "compatible",
"renesas,ebisu");
break;
case BOARD_DRAAK:
- ret = fdt_setprop_string(fdt, 0, "compatible",
+ ret = fdt_setprop_string(dt, 0, "compatible",
"renesas,draak");
break;
default:
@@ -460,27 +460,27 @@
reg = mmio_read_32(RCAR_PRR);
switch (reg & PRR_PRODUCT_MASK) {
case PRR_PRODUCT_H3:
- ret = fdt_appendprop_string(fdt, 0, "compatible",
+ ret = fdt_appendprop_string(dt, 0, "compatible",
"renesas,r8a7795");
break;
case PRR_PRODUCT_M3:
- ret = fdt_appendprop_string(fdt, 0, "compatible",
+ ret = fdt_appendprop_string(dt, 0, "compatible",
"renesas,r8a7796");
break;
case PRR_PRODUCT_M3N:
- ret = fdt_appendprop_string(fdt, 0, "compatible",
+ ret = fdt_appendprop_string(dt, 0, "compatible",
"renesas,r8a77965");
break;
case PRR_PRODUCT_V3M:
- ret = fdt_appendprop_string(fdt, 0, "compatible",
+ ret = fdt_appendprop_string(dt, 0, "compatible",
"renesas,r8a77970");
break;
case PRR_PRODUCT_E3:
- ret = fdt_appendprop_string(fdt, 0, "compatible",
+ ret = fdt_appendprop_string(dt, 0, "compatible",
"renesas,r8a77990");
break;
case PRR_PRODUCT_D3:
- ret = fdt_appendprop_string(fdt, 0, "compatible",
+ ret = fdt_appendprop_string(dt, 0, "compatible",
"renesas,r8a77995");
break;
default:
diff --git a/plat/rockchip/rk3399/drivers/dram/dfs.c b/plat/rockchip/rk3399/drivers/dram/dfs.c
index 3b627d2..816372b 100644
--- a/plat/rockchip/rk3399/drivers/dram/dfs.c
+++ b/plat/rockchip/rk3399/drivers/dram/dfs.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -78,10 +78,10 @@
.zqcsi = 0
};
-static uint32_t get_cs_die_capability(struct rk3399_sdram_params *sdram_config,
+static uint32_t get_cs_die_capability(struct rk3399_sdram_params *ram_config,
uint8_t channel, uint8_t cs)
{
- struct rk3399_sdram_channel *ch = &sdram_config->ch[channel];
+ struct rk3399_sdram_channel *ch = &ram_config->ch[channel];
uint32_t bandwidth;
uint32_t die_bandwidth;
uint32_t die;
diff --git a/services/std_svc/spm_mm/spm_main.c b/services/std_svc/spm_mm/spm_main.c
index 7525763..706b69d 100644
--- a/services/std_svc/spm_mm/spm_main.c
+++ b/services/std_svc/spm_mm/spm_main.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -86,14 +86,14 @@
* This function takes an SP context pointer and performs a synchronous entry
* into it.
******************************************************************************/
-static uint64_t spm_sp_synchronous_entry(sp_context_t *sp_ctx)
+static uint64_t spm_sp_synchronous_entry(sp_context_t *ctx)
{
uint64_t rc;
- assert(sp_ctx != NULL);
+ assert(ctx != NULL);
/* Assign the context of the SP to this CPU */
- cm_set_context(&(sp_ctx->cpu_ctx), SECURE);
+ cm_set_context(&(ctx->cpu_ctx), SECURE);
/* Restore the context assigned above */
cm_el1_sysregs_context_restore(SECURE);
@@ -104,7 +104,7 @@
dsbish();
/* Enter Secure Partition */
- rc = spm_secure_partition_enter(&sp_ctx->c_rt_ctx);
+ rc = spm_secure_partition_enter(&ctx->c_rt_ctx);
/* Save secure state */
cm_el1_sysregs_context_save(SECURE);