diff --git a/plat/marvell/armada/common/mrvl_sip_svc.c b/plat/marvell/armada/common/mrvl_sip_svc.c
index 0291024..64187fb 100644
--- a/plat/marvell/armada/common/mrvl_sip_svc.c
+++ b/plat/marvell/armada/common/mrvl_sip_svc.c
@@ -9,6 +9,7 @@
 #include <common/runtime_svc.h>
 #include <drivers/marvell/cache_llc.h>
 #include <drivers/marvell/mochi/ap_setup.h>
+#include <drivers/rambus/trng_ip_76.h>
 #include <lib/smccc.h>
 
 #include <marvell_plat_priv.h>
@@ -37,6 +38,9 @@
 #define MV_SIP_PMU_IRQ_ENABLE	0x82000012
 #define MV_SIP_PMU_IRQ_DISABLE	0x82000013
 
+/* TRNG */
+#define MV_SIP_RNG_64		0xC200FF11
+
 #define MAX_LANE_NR		6
 #define MVEBU_COMPHY_OFFSET	0x441000
 #define MVEBU_CP_BASE_MASK	(~0xffffff)
@@ -68,6 +72,7 @@
 			       u_register_t flags)
 {
 	u_register_t ret;
+	uint32_t w2[2] = {0, 0};
 	int i;
 
 	debug("%s: got SMC (0x%x) x1 0x%lx, x2 0x%lx, x3 0x%lx\n",
@@ -131,7 +136,9 @@
 		mvebu_pmu_interrupt_disable();
 		SMC_RET1(handle, 0);
 #endif
-
+	case MV_SIP_RNG_64:
+		ret = eip76_rng_get_random((uint8_t *)&w2, 4 * (x1 % 2 + 1));
+		SMC_RET3(handle, ret, w2[0], w2[1]);
 	default:
 		ERROR("%s: unhandled SMC (0x%x)\n", __func__, smc_fid);
 		SMC_RET1(handle, SMC_UNK);