feat(cpufeat): enable FEAT_BTI to FEAT_STATE_CHECKED
Introduce the is_feat_bti_{supported, present}() helpers and replace
checks for ENABLE_BTI with it. Also factor out the setting of
SCTLR_EL3.BT out of the PAuth enablement and place it in the respective
entrypoints where we initialise SCTLR_EL3. This makes PAuth
self-contained and SCTLR_EL3 initialisation centralised.
Change-Id: I0c0657ff1e78a9652cd2cf1603478283dc01f17b
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>
diff --git a/lib/extensions/pauth/pauth_helpers.S b/lib/extensions/pauth/pauth_helpers.S
index fb5fa97..1f0e2e0 100644
--- a/lib/extensions/pauth/pauth_helpers.S
+++ b/lib/extensions/pauth/pauth_helpers.S
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019, Arm Limited. All rights reserved.
+ * Copyright (c) 2019-2025, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -32,11 +32,6 @@
/* Enable pointer authentication */
mrs x0, sctlr_el1
orr x0, x0, #SCTLR_EnIA_BIT
-
-#if ENABLE_BTI
- /* Enable PAC branch type compatibility */
- bic x0, x0, #(SCTLR_BT0_BIT | SCTLR_BT1_BIT)
-#endif
msr sctlr_el1, x0
isb
@@ -73,11 +68,6 @@
/* Enable pointer authentication */
mrs x0, sctlr_el3
orr x0, x0, #SCTLR_EnIA_BIT
-
-#if ENABLE_BTI
- /* Enable PAC branch type compatibility */
- bic x0, x0, #SCTLR_BT_BIT
-#endif
msr sctlr_el3, x0
isb
@@ -130,11 +120,6 @@
/* Enable pointer authentication */
mrs x9, sctlr_el3
orr x9, x9, #SCTLR_EnIA_BIT
-
-#if ENABLE_BTI
- /* Enable PAC branch type compatibility */
- bic x9, x9, #SCTLR_BT_BIT
-#endif
msr sctlr_el3, x9
isb
ret
diff --git a/lib/xlat_tables_v2/xlat_tables_core.c b/lib/xlat_tables_v2/xlat_tables_core.c
index bd7f017..76aba50 100644
--- a/lib/xlat_tables_v2/xlat_tables_core.c
+++ b/lib/xlat_tables_v2/xlat_tables_core.c
@@ -210,17 +210,14 @@
desc |= LOWER_ATTRS(ISH);
}
- /* Check if Branch Target Identification is enabled */
-#if ENABLE_BTI
/* Set GP bit for block and page code entries
* if BTI mechanism is implemented.
*/
- if (is_feat_bti_present() &&
+ if (is_feat_bti_supported() &&
((attr & (MT_TYPE_MASK | MT_RW |
MT_EXECUTE_NEVER)) == MT_CODE)) {
desc |= GP;
}
-#endif
} else {
assert(mem_type == MT_NON_CACHEABLE);
desc |= LOWER_ATTRS(ATTR_NON_CACHEABLE_INDEX | OSH);