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TEGRA_BOOT_UART_BASE 		:= 0x70006000
$(eval $(call add_define,TEGRA_BOOT_UART_BASE))

TZDRAM_BASE			:= 0xFDC00000
$(eval $(call add_define,TZDRAM_BASE))

ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT	:= 1
$(eval $(call add_define,ERRATA_TEGRA_INVALIDATE_BTB_AT_BOOT))

PLATFORM_CLUSTER_COUNT		:= 2
$(eval $(call add_define,PLATFORM_CLUSTER_COUNT))

PLATFORM_MAX_CPUS_PER_CLUSTER	:= 4
$(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER))

BL31_SOURCES		+=	${SOC_DIR}/plat_psci_handlers.c \
				${SOC_DIR}/plat_setup.c \
				${SOC_DIR}/plat_secondary.c

# Enable workarounds for selected Cortex-A53 erratas.
ERRATA_A53_826319	:=	1