feat(tc): update CPU PMU nodes for tc4
CPU PMU types are not same for all CPUs on TC platforms, so define the
PMU node per microarchitecture.
Signed-off-by: Jagdish Gediya <jagdish.gediya@arm.com>
Signed-off-by: Icen.Zeyada <Icen.Zeyada2@arm.com>
Change-Id: Ibbe8dacda695ccb45965c7f4680d4b03cffdb815
diff --git a/fdts/tc4.dts b/fdts/tc4.dts
index 98cfea1..7a2f174 100644
--- a/fdts/tc4.dts
+++ b/fdts/tc4.dts
@@ -13,9 +13,9 @@
#define MHU_TX_ADDR 46240000 /* hex */
#define MHU_RX_ADDR 46250000 /* hex */
-#define LIT_CPU_PMU_COMPATIBLE "arm,armv8-pmuv3"
-#define MID_CPU_PMU_COMPATIBLE "arm,armv8-pmuv3"
-#define BIG_CPU_PMU_COMPATIBLE "arm,armv8-pmuv3"
+#define LIT_CPU_PMU_COMPATIBLE "arm,nevis-pmu"
+#define MID_CPU_PMU_COMPATIBLE "arm,gelas-pmu"
+#define BIG_CPU_PMU_COMPATIBLE "arm,travis-pmu"
#define RSE_MHU_TX_ADDR 49020000 /* hex */
#define RSE_MHU_RX_ADDR 49030000 /* hex */