drivers: marvell: thermal: use dedicated function for thermal SiPs
Since more drivers which uses dfx register set need to be handled with
use of SiP services, use dedicated and more meaningful name for thermal
SiP services.
Change-Id: Ic2ac27535a4902477df8edc4c86df3e34cb2344f
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-on: https://sj1git1.cavium.com/25054
Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
diff --git a/drivers/marvell/secure_dfx_access/armada_thermal.c b/drivers/marvell/secure_dfx_access/armada_thermal.c
index 776fb24..4f7191b 100644
--- a/drivers/marvell/secure_dfx_access/armada_thermal.c
+++ b/drivers/marvell/secure_dfx_access/armada_thermal.c
@@ -217,8 +217,8 @@
*read = (mmio_read_32(TSEN_STATUS) & TSEN_STATUS_VALID_MASK);
}
-int mvebu_dfx_handle(u_register_t func, u_register_t *read, u_register_t x2,
- u_register_t x3)
+int mvebu_dfx_thermal_handle(u_register_t func, u_register_t *read,
+ u_register_t x2, u_register_t x3)
{
debug_enter();
diff --git a/drivers/marvell/secure_dfx_access/dfx.h b/drivers/marvell/secure_dfx_access/dfx.h
index e60d2f9..52efbf9 100644
--- a/drivers/marvell/secure_dfx_access/dfx.h
+++ b/drivers/marvell/secure_dfx_access/dfx.h
@@ -13,5 +13,5 @@
#define MV_SIP_DFX_THERMAL_THRESH 5
#define MV_SIP_DFX_THERMAL_SEL_CHANNEL 6
-int mvebu_dfx_handle(u_register_t func, u_register_t *read, u_register_t x2,
- u_register_t x3);
+int mvebu_dfx_thermal_handle(u_register_t func, u_register_t *read,
+ u_register_t x2, u_register_t x3);
diff --git a/plat/marvell/armada/common/mrvl_sip_svc.c b/plat/marvell/armada/common/mrvl_sip_svc.c
index bdf79b2..aa94393 100644
--- a/plat/marvell/armada/common/mrvl_sip_svc.c
+++ b/plat/marvell/armada/common/mrvl_sip_svc.c
@@ -139,8 +139,12 @@
SMC_RET1(handle, 0);
#endif
case MV_SIP_DFX:
- ret = mvebu_dfx_handle(x1, &read, x2, x3);
- SMC_RET2(handle, ret, read);
+ if (x1 >= MV_SIP_DFX_THERMAL_INIT &&
+ x1 <= MV_SIP_DFX_THERMAL_SEL_CHANNEL) {
+ ret = mvebu_dfx_thermal_handle(x1, &read, x2, x3);
+ SMC_RET2(handle, ret, read);
+ }
+ SMC_RET1(handle, SMC_UNK);
case MV_SIP_RNG_64:
ret = eip76_rng_get_random((uint8_t *)&w2, 4 * (x1 % 2 + 1));
SMC_RET3(handle, ret, w2[0], w2[1]);