commit 750b5c963092901e552e029fe34faa517098f2d1
author Chiaki Fujii <chiaki.fujii.wj@renesas.com> Fri Oct 30 10:45:18 2020 +0900
committer Marek Vasut <marek.vasut+renesas@gmail.com> Sat Jul 10 17:35:28 2021 +0200
tree 48ad592c4bb37dda527b0f977ee0045302d38556
parent 6552f64f153a1dce9451783fa29a529304e36b5a

fix(drivers/rcar3): ddr: update DDR setting for H3, M3, M3N

[IPL/DDR]
- Update H3, M3, M3N DDR setting rev.0.41.

Signed-off-by: Chiaki Fujii <chiaki.fujii.wj@renesas.com>
Signed-off-by: Yoshifumi Hosoya <yoshifumi.hosoya.wj@renesas.com>
Change-Id: Idd2fbea621365d84b566748b5b7d7fb2f0d08168

drivers/renesas/common/ddr/ddr_b/boot_init_dram_regdef.h

diff --git a/drivers/renesas/common/ddr/ddr_b/boot_init_dram_regdef.h b/drivers/renesas/common/ddr/ddr_b/boot_init_dram_regdef.h
index 56363eb..3cb1975 100644
--- a/drivers/renesas/common/ddr/ddr_b/boot_init_dram_regdef.h
+++ b/drivers/renesas/common/ddr/ddr_b/boot_init_dram_regdef.h
@@ -1,11 +1,11 @@
 /*
- * Copyright (c) 2015-2020, Renesas Electronics Corporation.
+ * Copyright (c) 2015-2021, Renesas Electronics Corporation.
  * All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
 
-#define RCAR_DDR_VERSION	"rev.0.40"
+#define RCAR_DDR_VERSION	"rev.0.41"
 #define DRAM_CH_CNT		0x04
 #define SLICE_CNT		0x04
 #define CS_CNT			0x02