| commit | 74f8405a0e4a53d4eaf214b52995012ce697e466 | [log] [tgz] |
|---|---|---|
| author | developer <developer@mediatek.com> | Tue Dec 15 15:45:23 2020 +0800 |
| committer | developer <developer@mediatek.com> | Wed Dec 16 17:22:02 2020 +0800 |
| tree | 7995ff502a1c86b05726d28b89d2e48d4cda16fa | |
| parent | 35dfb096c33ac01fb9c23f6d5de7d2fdc97f600d [diff] |
mediatek: mt8192: Fix non-MISRA compliant code
CID 364146: Control flow issues (DEADCODE)
Since the value of PSTATE_PWR_LVL_MASK and the value the of PLAT_MAX_PWR_LVL
are equal on mt8192, the following equation never hold.
if (aff_lvl > PLAT_MAX_PWR_LVL) {
return PSCI_E_INVALID_PARAMS;
}
Remove the deadcode to comply with MISRA standard.
Change-Id: I71d0aa826eded8c3b5af961e733167ae40699398