fix(cm): add more feature registers to EL1 context mgmt
The following system registers are made part of save and restore
operations for EL1 context:
TRFCR_EL1
SCXTNUM_EL0
SCXTNUM_EL1
GCSCR_EL1
GCSCRE0_EL1
GCSPR_EL1
GCSPR_EL0
Change-Id: I1077112bdc29a6c9cd39b9707d6cf10b95fa15e3
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
diff --git a/include/lib/el3_runtime/aarch64/context.h b/include/lib/el3_runtime/aarch64/context.h
index 74790d1..4f11ad2 100644
--- a/include/lib/el3_runtime/aarch64/context.h
+++ b/include/lib/el3_runtime/aarch64/context.h
@@ -191,10 +191,35 @@
#define CTX_TCR2_REGS_END CTX_S2POE_REGS_END
#endif /* ENABLE_FEAT_TCR2 */
+#if ENABLE_TRF_FOR_NS
+#define CTX_TRFCR_EL1 (CTX_TCR2_REGS_END + U(0x0))
+#define CTX_TRF_REGS_END (CTX_TCR2_REGS_END + U(0x10)) /* Align to the next 16 byte boundary */
+#else
+#define CTX_TRF_REGS_END CTX_TCR2_REGS_END
+#endif /* ENABLE_TRF_FOR_NS */
+
+#if ENABLE_FEAT_CSV2_2
+#define CTX_SCXTNUM_EL0 (CTX_TRF_REGS_END + U(0x0))
+#define CTX_SCXTNUM_EL1 (CTX_TRF_REGS_END + U(0x8))
+#define CTX_CSV2_2_REGS_END (CTX_TRF_REGS_END + U(0x10)) /* Align to the next 16 byte boundary */
+#else
+#define CTX_CSV2_2_REGS_END CTX_TRF_REGS_END
+#endif /* ENABLE_FEAT_CSV2_2 */
+
+#if ENABLE_FEAT_GCS
+#define CTX_GCSCR_EL1 (CTX_CSV2_2_REGS_END + U(0x0))
+#define CTX_GCSCRE0_EL1 (CTX_CSV2_2_REGS_END + U(0x8))
+#define CTX_GCSPR_EL1 (CTX_CSV2_2_REGS_END + U(0x10))
+#define CTX_GCSPR_EL0 (CTX_CSV2_2_REGS_END + U(0x18))
+#define CTX_GCS_REGS_END (CTX_CSV2_2_REGS_END + U(0x20)) /* Align to the next 16 byte boundary */
+#else
+#define CTX_GCS_REGS_END CTX_CSV2_2_REGS_END
+#endif /* ENABLE_FEAT_GCS */
+
/*
- * End of system registers.
+ * End of EL1 system registers.
*/
-#define CTX_EL1_SYSREGS_END CTX_TCR2_REGS_END
+#define CTX_EL1_SYSREGS_END CTX_GCS_REGS_END
/*******************************************************************************
* Constants that allow assembler code to access members of and the 'fp_regs'