Add CCN support to FVP platform port
This patch adds support to select CCN driver for FVP during build.
A new build option `FVP_INTERCONNECT_DRIVER` is added to allow
selection between the CCI and CCN driver. Currently only the CCN-502
variant is supported on FVP.
The common ARM CCN platform helper file now verifies the cluster
count declared by platform is equal to the number of root node
masters exported by the ARM Standard platform.
Change-Id: I71d7b4785f8925ed499c153b2e9b9925fcefd57a
diff --git a/plat/arm/board/fvp/fvp_def.h b/plat/arm/board/fvp/fvp_def.h
index b0f07ef..40d20fc 100644
--- a/plat/arm/board/fvp/fvp_def.h
+++ b/plat/arm/board/fvp/fvp_def.h
@@ -40,6 +40,10 @@
#define FVP_PRIMARY_CPU 0x0
+/* Defines for the Interconnect build selection */
+#define FVP_CCI 1
+#define FVP_CCN 2
+
/*******************************************************************************
* FVP memory map related constants
******************************************************************************/
@@ -57,16 +61,23 @@
#define DEVICE0_BASE 0x20000000
#define DEVICE0_SIZE 0x0c200000
+/*
+ * In case of FVP models with CCN, the CCN register space overlaps into
+ * the NSRAM area.
+ */
+#if FVP_INTERCONNECT_DRIVER == FVP_CCN
+#define DEVICE1_BASE 0x2e000000
+#define DEVICE1_SIZE 0x1A00000
+#else
#define DEVICE1_BASE 0x2f000000
#define DEVICE1_SIZE 0x200000
-
+#define NSRAM_BASE 0x2e000000
+#define NSRAM_SIZE 0x10000
+#endif
/* Devices in the second GB */
#define DEVICE2_BASE 0x7fe00000
#define DEVICE2_SIZE 0x00200000
-#define NSRAM_BASE 0x2e000000
-#define NSRAM_SIZE 0x10000
-
#define PCIE_EXP_BASE 0x40000000
#define TZRNG_BASE 0x7fe60000