tree 7ef5e68936c9f061dd0d9910d824c7434eec78c4
parent eb9e5e2dea7f4104885ef3ed12ffcc5d4881e8a8
author johpow01 <john.powell@arm.com> 1646094844 -0600
committer John Powell <john.powell@arm.com> 1646780642 +0100

fix(errata): workaround for  Cortex-A710 2282622

Cortex-A710 erratum 2282622 is a Cat B erratum that applies to revisions
r0p0, r1p0, and r2p0, and is fixed in r2p1. The workaround is to set
CPUACTLR2_EL1[0] to 1, which will force PLDW/PFRM ST to behave like
PLD/PRFM LD and not cause invalidations to other PE caches.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1775101

Signed-off-by: John Powell <john.powell@arm.com>
Change-Id: Ic48409822536e9eacc003300036a1f0489593020