diff --git a/plat/fvp/fvp_gic.c b/plat/fvp/fvp_gic.c
index fed2fca..3156da9 100644
--- a/plat/fvp/fvp_gic.c
+++ b/plat/fvp/fvp_gic.c
@@ -324,7 +324,7 @@
  * the GIC cpu interface. INTR_TYPE_INVAL is returned when there is no
  * interrupt pending.
  ******************************************************************************/
-uint32_t ic_get_pending_interrupt_type()
+uint32_t plat_ic_get_pending_interrupt_type()
 {
 	uint32_t id, gicc_base;
 
@@ -346,7 +346,7 @@
  * the GIC cpu interface. INTR_ID_UNAVAILABLE is returned when there is no
  * interrupt pending.
  ******************************************************************************/
-uint32_t ic_get_pending_interrupt_id()
+uint32_t plat_ic_get_pending_interrupt_id()
 {
 	uint32_t id, gicc_base;
 
@@ -370,7 +370,7 @@
  * This functions reads the GIC cpu interface Interrupt Acknowledge register
  * to start handling the pending interrupt. It returns the contents of the IAR.
  ******************************************************************************/
-uint32_t ic_acknowledge_interrupt()
+uint32_t plat_ic_acknowledge_interrupt()
 {
 	return gicc_read_IAR(fvp_get_cfgvar(CONFIG_GICC_ADDR));
 }
@@ -379,7 +379,7 @@
  * This functions writes the GIC cpu interface End Of Interrupt register with
  * the passed value to finish handling the active interrupt
  ******************************************************************************/
-void ic_end_of_interrupt(uint32_t id)
+void plat_ic_end_of_interrupt(uint32_t id)
 {
 	gicc_write_EOIR(fvp_get_cfgvar(CONFIG_GICC_ADDR), id);
 	return;
@@ -390,7 +390,7 @@
  * this interrupt has been configured under by the interrupt controller i.e.
  * group0 or group1.
  ******************************************************************************/
-uint32_t ic_get_interrupt_type(uint32_t id)
+uint32_t plat_ic_get_interrupt_type(uint32_t id)
 {
 	uint32_t group;